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June 1997
NDS332P P-Channel Logic Level Enhancement Mode Field Effect Transistor
General Description
These P-Channel logic level enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics, and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package.
Features
-1 A, -20 V, RDS(ON) = 0.41 @ VGS= -2.7 V RDS(ON) = 0.3 @ VGS = -4.5 V. Very low level gate drive requirements allowing direct operation in 3V circuits. VGS(th) < 1.0V. Proprietary package design using copper lead frame for superior thermal and electrical capabilities. High density cell design for extremely low RDS(ON). Exceptional on-resistance and maximum DC current capability. Compact industry standard SOT-23 surface Mount package.
________________________________________________________________________________
D
G
S
Asolute Maximum Ratings
Symbol VDSS VGSS ID PD TJ,TSTG Parameter Drain-Source Voltage
T A = 25C unless otherwise noted
NDS332P -20 8
(Note 1a)
Units V V A
Gate-Source Voltage - Continuous Drain Current - Continuous - Pulsed Maximum Power Dissipation
(Note 1a) (Note 1b)
-1 -10 0.5 0.46 -55 to 150
W
Operating and Storage Temperature Range
C
THERMAL CHARACTERISTICS RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)
250 75
C/W C/W
(c) 1997 Fairchild Semiconductor Corporation
NDS332P Rev. E
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS BVDSS IDSS Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current VGS = 0 V, ID = -250 A VDS = -16 V, VGS = 0 V TJ = 55C IGSS IGSS Gate - Body Leakage Current Gate - Body Leakage Current VGS = 8 V, VDS= 0 V VGS = -8 V, VDS= 0 V -20 -1 -10 100 -100 V A A nA nA
ON CHARACTERISTICS (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 A TJ =125C RDS(ON) Static Drain-Source On-Resistance VGS = -2.7 V, ID = -1 A TJ =125C VGS = -4.5 V, ID = -1.1 A ID(ON) On-State Drain Current VGS = -2.7 V, VDS = -5 V VGS = -4.5 V, VDS = -5 V gFS Ciss Coss Crss tD(on) tr tD(off) tf Qg Qgs Qgd -1.5 -2.5 2.2 -0.4 -0.3 -0.6 -0.45 0.35 0.5 0.26 -1 -0.8 0.41 0.74 0.3 A V
Forward Transconductance
Input Capacitance Output Capacitance Reverse Transfer Capacitance
VDS = -5 V, ID= -1 A VDS = -10 V, VGS = 0 V, f = 1.0 MHz
S
pF pF pF
DYNAMIC CHARACTERISTICS 195 105 40
SWITCHING CHARACTERISTICS (Note 2) Turn - On Delay Time Turn - On Rise Time Turn - Off Delay Time Turn - Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDS = -5 V, ID = -1 A, VGS = -4.5 V VDD = -6 V, ID = -1 A, VGS = -4.5 V, RGEN = 6 8 30 25 27 3.7 0.5 0.9 15 45 45 45 5 ns ns ns ns nC nC nC
NDS332P Rev. E
Electrical Characteristics (TA = 25C unless otherwise noted)
Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS IS VSD Maximum Continuous Source Current Drain-Source Diode Forward Voltage VGS = 0 V, IS = -0.42 A (Note 2) -0.75 -0.42 -1.2 A V
Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.
PD (t) =
T J -T A R JA (t)
=
T J -T A R JC +R CA (t)
= I 2 (t) x R DS(ON)@T J D
Typical RJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment: a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper. b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.
1a
1b
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%.
NDS332P Rev. E
Typical Electrical Characteristics
-2.5 I D , DRAIN-SOURCE CURRENT (A) 1.8
-2.0
RDS(ON) , NORMALIZED
-2
-3.5 -3.0
DRAIN-SOURCE ON-RESISTANCE
VGS = -4.5V
-2.5 -2.7
1.6 1.4 VGS =-2.0V 1.2
-1.5
-2.5
1 0.8 0.6 0.4
-2.7 -3.0 -3.5 -4.5
-1
-1.5
-0.5
0
0
-0.5 V
DS
-1 -1.5 -2 -2.5 , DRAIN-SOURCE VOLTAGE (V)
-3
0
-0.5
-1 -1.5 -2 I , DRAIN CURRENT (A)
D
-2.5
-3
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
1.8 DRAIN-SOURCE ON-RESISTANCE DRAIN-SOURCE ON-RESISTANCE 1.6 1.4 1.2 1 0.8 0.6 0.4 -50
1.8
R DS(ON) , NORMALIZED
I D = -1A V GS = -2.7
R DS(on), NORMALIZED
V GS = -2.7 V
1.6 1.4 1.2 1 0.8 0.6 0.4
TJ = 125C
25C
-55C
-25
0 25 50 75 100 T , JUNCTION TEMPERATURE (C)
J
125
150
0
-0.5
-1 -1.5 -2 I , DRAIN CURRENT (A)
D
-2.5
-3
Figure 3. On-Resistance Variation with Temperature.
Figure 4. On-Resistance Variation with Drain Current and Temperature.
V DS = - 3V
-1.2
25C T = -55C J 125C
Vth , NORMALIZED
GATE-SOURCE THRESHOLD VOLTAGE (V)
-1.5
1.15 1.1
V DS = VGS I
D
= -250A
I D , DRAIN CURRENT (A)
1.05 1 0.95 0.9 0.85 0.8 -50
-0.9
-0.6
-0.3
0 -0.5
-0.75 V
GS
-1
-1.25
-1.5
-1.75
-2
-25
, GATE TO SOURCE VOLTAGE (V)
0 25 50 75 100 TJ , JUNCTION TEMPERATURE (C)
125
150
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with Temperature.
NDS332P Rev.E
Typical Electrical Characteristics (continued)
1.12
1
DRAIN-SOURCE BREAKDOWN VOLTAGE
VGS =0V
I D = -250A
1.08
-I , REVERSE DRAIN CURRENT (A)
BV DSS , NORMALIZED
0.1 0.05
1.04
TJ = 125C
0.01
25C -55C
1
0.96
0.001
0.92 -50
-25
0 T
J
25 50 75 100 , JUNCTION TEMPERATURE (C)
125
150
S
0.0001 0 0.2 0.4 0.6 0.8 -V SD , BODY DIODE FORWARD VOLTAGE (V) 1
Figure 7. Breakdown Voltage Variation with Temperature.
Figure 8. Body Diode ForwardVoltageVariation with Source Current and Temperature.
500 300 CAPACITANCE (pF) 200
5 -V GS , GATE-SOURCE VOLTAGE (V)
I D = -1A
VDS = -5V -10V -15V
4
Ciss Coss
3
100
2
50 30 20 0.1
f = 1 MHz VGS = 0V
0.2 -V
DS
Crss
1
0.5 1 2 5 , DRAIN TO SOURCE VOLTAGE (V)
10
20
0
0
1
2 3 Q g , GATE CHARGE (nC)
4
5
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
VDD VIN
D
ton t d(on) tr
90%
t off t d(off)
90%
tf
RL V OUT
DUT
VGS
VOUT
10% 10% 90%
R GEN
G
V IN
S 10%
50%
50%
PULSE WIDTH
INVERTED
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms.
NDS332PRev. E
Typical Electrical Characteristics (continued)
, TRANSCONDUCTANCE (SIEMENS) 4 20
VDS =- 5V
3
T = -55C J
-I D , DRAIN CURRENT (A)
10 5 2 1 0.5
N) S(O RD IT LIM
1m 10m s 100 ms
s
25C 125C
2
1s
0.1 0.03
1
g
FS
V GS = -2.7V SINGLE PULSE RJA = See Note 1b TA = 25C
0.2
10s DC
0
0
-0.5
-1 -1.5 -2 I D, DRAIN CURRENT (A)
-2.5
-3
0.01 0.1
0.5 1 2 5 10 -VDS , DRAIN-SOURCE VOLTAGE (V)
20
50
Figure 13. Transconductance Variation with Drain Current and Temperature.
Figure 14. Maximum Safe Operating Area.
STEADY-STATE POWER DISSIPATION (W)
0.8
-ID , STEADY-STATE DRAIN CURRENT (A)
1
1.4
1.2
0.6
1b
1a
1
1b
0.4
1a
0.8
0.2
4.5"x5" FR-4 Board TA = 25 oC Still Air
4.5"x5" FR-4 Board TA = 25 oC Still Air VGS = -2.7V
0
0
0.1 0.2 0.3 2oz COPPER MOUNTING PAD AREA (in 2)
0.4
0.6
0
0.1 0.2 0.3 2 2oz COPPER MOUNTING PAD AREA (in )
0.4
Figue 15. SuperSOTTM _ 3 Maximum Steady-State Power Dissipation versus Copper Mounting Pad Area.
1
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
Figure 16. Maximum Steady-State Drain Current versus Copper Mounting Pad Area.
0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001
D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse
R JA (t) = r(t) * R JA R JA = See Note 1b
P(pk)
t1
t2
TJ - TA = P * R JA (t) Duty Cycle, D = t1 /t2
0.001
0.01
0.1 t 1 , TIME (sec)
1
10
100
300
Figure 17. Transient Thermal Response Curve.
Note : Characterization performed using the conditions described in note 1b. Transient thermal response will change depending on the circuit board design.
NDS332PRev. E

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