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| TC83220-0020 TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC83220-0020 TC83220-0020 Single-Chip CMOS LSI for FL (fluorescent) Calculator The TOSHIBA printing/display calculator circuit TC83220-0020 is 10- or 12-digit calculator on single-chip CMOS LSI. TC83220-0020 can drive the printing machine (M2158II/ M2156II; EPSON) with magnet driver circuit, and can drive the fluorescent display tube with DC-DC converter. It contains a 4 K-word ROM, a 256 x 4-bit RAM. Features Operational Features * Print: 11 or 13 digits of data. (including decimal point. 2 digits of operational symbol.) 3 digits of commas. * Display: 10 or 12 digits of data. (including punctuation in each digit.) 1 digit of floating minus sign, memory load, error symbol. 3 digits of commas. * * * Decimal output: Decimal set lock key controls output format. Fixed decimal setting ("0", "1", "2", "3", "4", "6"), full floating decimal, and ADD mode. Key input buffer: 8 stages Function: 4 basic arithmetic functions (+, -, x, /). Repeat addition and subtraction. Automatic constants in multiplication, division, percent calculation, calculations. Automatic percent add-on and percent discount calculation. Memory calculation. Automatic accumulating calculation. Gross margin profit calculation. Delta percent calculation. Tax calculation. Grand total calculation. Two-key rollover. * * * Item counter: 0~999 count up or -999~0~999 count up/down by depressing of Punctuation: Commas for thousands on display Kinds of touch key: +, - key. Weight: 4.12 g (typ.) 1 2003-02-28 TC83220-0020 * Kinds of lock key: "NP" printing mode selectable switch. "" summation mode selectable switch. "5/4" "CUT" "UP" rounding switch. Fixed point mode selectable switch. "0", "1", "2", "3", "4", "6", "F", "A". "IC+" "IC" item counter mode selectable switch. "GT" grand total memory selectable switch. "SET", "CAL" tax memory selectable switch. * * * * Duty of display: Duty = 1/17.77 Leading zero suppression Trailing zero suppression Tax calculation: +TAX -TAX SET CAL key is calculation for included tax. key is calculation for excluded tax. selects set mode for tax rate. selects normal calculation mode. SET CAL to to CAL SET stores number of display to tax memory. recalls tax rate to display from tax memory. Changing lock key from Changing lock key from Depression of tax. Depression of tax. +TAX -TAX following data key at CAL mode performs the calculating included following data key at CAL mode performs the calculating excluded Electrical Features * * * * P-MOS output buffer with pull down resistor for direct driving of fluorescent display tube. Oscillator/clock generator internal to chip. Key board encoding internal to chip. Dual in line package. Protection (1) (2) In the overflow condition, all key except "C", "C/CE", "CE", "Feed", "" key are inoperative. Key bouncing protection (at 4 MHz clock) Key read in: 15 ms Key off: 40 ms Function Select (1) "10/12" selectable with auto power off mode ON........... 10-digits calculated OFF......... 12-digits calculated Speed of Calculation (at 4 MHz clock) (1) (2) (3) (4) (5) Addition Multiplication Division Memory calculation Percentage calculation 1+1+ x 999999999999 = 31.2 ms 26.8 ms 999999999999 / 1 = 100.6 ms 999999999999 / 1 M + 108.8 ms 1 x 999999999999% 35.2 ms 2 2003-02-28 TC83220-0020 Pin Assignment (top view) 3 2003-02-28 TC83220-0020 System Diagram *: Connection to HOLD pin is shown in the following page. 4 2003-02-28 TC83220-0020 Key Connection Touch Key Lock Key 5 2003-02-28 TC83220-0020 Connection of FL Note 1: R70 digit (P20) of "E" data. Note 2: R70 digit (P22) of "-" data. Note 3: R70 digit (P23) of "M" data. Note 4: R70 digit (P21) of "GT" data. 6 2003-02-28 TC83220-0020 Operation Example Key TAB 4/5 F IC 10/12 S GT MOD Touch POWER*ON*** 4/5 OFF 10 OFF OFF CAL IC+ 1+****** 2-****** ****** 1. ***+ 2. ***002***************** -1. *** 1. -1. -1. ******* 002***************** -1. **** OFF 3****** 4****** =****** 3. *** 4. *** 4. ***= 3. **** 3. 12. 3. 5. 5****** 6%****** 5. *** 6. ***% 0.3 **** 0.3 +****** 5.3 *+*% 2****** 3%****** 2. *** 3. ***% 66.66666666 **** 66.66666666 2. 2*MU/D**** 3=****** 2. *M 3. ***% 0.06185567 *D** 2.06185567 **** 2.06185567 2. 2D%****** 3=****** 2. *D 3. ***= 1. *D** 50. *D*% 50. Note 5: 7 2003-02-28 TC83220-0020 Key TAB 4/5 F IC 10/12 S 10 GT MOD Touch 3***** 4***** =***** 3. *** 4. *** 4. ***= 3. ***+ 4/5 OFF S OFF CAL C***** 0. *C M 0. Note 5: 8 2003-02-28 TC83220-0020 Key TAB 4/5 IC 10/12 S GT MOD Touch M***** M****** S OFF CAL #/P***** 2*#/P***** #/P***** 0***** =***** Note 5: 9 2003-02-28 TC83220-0020 Key TAB 4/5 IC 10/12 S GT MOD Touch Note 5: 10 2003-02-28 TC83220-0020 Key TAB 4/5 F IC 10/12 S GT MOD Touch -45,43689321 *D 1,514.56310679 **** CUT OFF 12 OFF OFF CAL Note 5: 11 2003-02-28 TC83220-0020 Maximum Ratings (VSS = 0 V) Characteristics Supply voltage 1 Supply voltage 2 Input voltage Output voltage Output current Power dissipation (Topr = 70C) Soldering temperature, time Storage temperature Operating temperature Symbol VDD VKK VIN VOUT IOUT PD Tsld Tstg Topr Rating -0.5~7 -40~+0.5 -35~VDD + 0.5 -35~VDD + 0.5 -10 600 260 (10 s) -55~125 0~40 Unit V V V V mA mW C C C Recommended Operating Conditions (VSS = 0 V) Characteristics Operating temperature Supply voltage Supply voltage (FL) Supply voltage (hold) Input high voltage (except schmitt circuit input) Input high voltage (schmitt circuit input) Input high voltage Input low voltage (except schmitt circuit input) Input low voltage (schmitt circuit input) Input low voltage Output voltage (source open drain) Clock high pulse width Clock low pulse width (Note 6) (Note 6) VOUT TWCH TWCL VIL2 VIL3 VIL1 VIH2 VIH3 VIH1 Symbol Topr VDD VKK VDDH Test Circuit 3/4 3/4 3/4 3/4 3/4 VDD > 4.5 V = 3/4 3/4 3/4 VDD > 4.5 V = 3/4 3/4 3/4 3/4 3/4 VIN = VIH VIN = VIL VDD < 4.5 V 3/4 VKK VKK VDD 35 80 80 VDD < 4.5 V Test Condition 3/4 3/4 3/4 3/4 Min 0 4.5 -30 2 VDD 0.7 VDD 0.75 VDD 0.9 VKK Max 40 6 -15 6 VDD Unit C V V V V VDD VDD VDD 0.3 VDD 0.25 VDD 0.1 VDD 3/4 3/4 V V V V V V ns ns Note 6: In case of the external clock operation. 12 2003-02-28 TC83220-0020 Electrical Characteristics DC Characteristics (VSS = 0 V, VDD 10%, Topr = 0~40C) Characteristics Hysteresis voltage (schmitt circuit input) Input current ( RESET , HOLD , TEST ) Output leak current (source open drain) Output high voltage (P1~P2, R4~R9) Input pull down resistor (K0, R7~R9) Pull down resistor (source open drain) Operating supply current Supply current (after clear) Supply current (shown full digits) Holding supply current RKK IDD 0 IKK 1 IKK 2 IDD H RIN VOH ILO IIN VHS Symbol Test Circuit 3/4 Test Condition 3/4 Min 3/4 Typ. 0.7 Max 3/4 Unit V 3/4 VDD = 5.5 V, VIN = 5.5/0 V VDD = 5.5 V, VOUT = -32 V 3/4 3/4 50 mA 3/4 3/4 3/4 -10 mA 3/4 VDD = 4.5 V, IOH = -6 mA 2.4 3/4 3/4 V 3/4 VDD = 5.5 V, VKK = -30 V 3/4 3/4 3/4 3/4 3/4 VDD (VDDH) 5.5 V, fc = 4 MHz, VIN = 5.3/0.2 V VKK = -30 V, fc = 4 MHz VDD = 5.5 V 3/4 100 3/4 kW 50 3/4 3/4 3/4 3/4 80 200 kW 3 0.6 3.5 0.5 6 0.9 6 10 mA mA mA mA Oscillation Characteristics (Topr = 0~40C, VDD = 4.5~6.0 V) Circuit Test Condition Min Typ. Max Unit C = 10 pF X'tal (or ceramic) = 4 MHz 3/4 4 3/4 MHz 13 2003-02-28 TC83220-0020 The Proposal of Outer Circuit for Tax Rate Holding with Back-Up Battery Note 7: V1 = 3 V: Battery supply V2 = 5 V: AC supply ~HOLD pin is pulled down in the LSI, but normally pulled up to VDD. ~RESET pin is pulled up to VDD. (1) Setting POWER SW to ON, V2 is supplied to VDD pin, and also to HOLD pin. Then calculator operates normally. Setting POWER SW from ON to OFF, V1 is supplied to VDD pin and VSS is supplied to HOLD pin. Under this connection, TAX RATE is held. Setting POWER SW to ON, V2 is supplied to VDD pin, and also to HOLD pin. Then calculator operates normally with TAX RATE to be held. (2) (3) Note 8: V1 (battery) should be supplied to the circuit after V2 (AC) supply, because of prevention from exhaustion of battery and abnormal operation. 14 2003-02-28 TC83220-0020 Package Dimensions Weight: 4.12 g (typ.) 15 2003-02-28 TC83220-0020 RESTRICTIONS ON PRODUCT USE 000707EBA * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The TOSHIBA products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 16 2003-02-28 |
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