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 (R)
STD16NE10
N - CHANNEL 100V - 0.07 - 16A - IPAK/DPAK STripFETTM MOSFET
TYPE ST D16NE10
s s s s s
V DSS 100 V
R DS(on) < 0.1
ID 16 A
s
s
TYPICAL RDS(on) = 0.07 EXCEPTIONAL dv/dt CAPABILITY AVALANCHE RUGGED TECHNOLOGY 100% AVALANCHE TESTED APPLICATION ORIENTED CHARACTERIZATION THROUG-HOLE IPAK (TO-251) POWER PACKAGE IN TUBE (SUFFIX "-1") SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX "T4")
3 2 1
1 3
DESCRIPTION This Power MOSFET is the latest development of SGS-THOMSON unique "Single Feature SizeTM " strip-based process.The resulting transistor shows extremely high packing density for low onresistance, rugged avalanche characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. APPLICATIONS s DC MOTOR CONTROL (DISK DRIVERS,etc.) s DC-DC & DC-ACCONVERTERS s SYNCHRONOUS RECTIFICATION ABSOLUTE MAXIMUM RATINGS
Symbol V DS V DGR V GS ID ID IDM (*) P t ot Parameter Drain-source Voltage (V GS = 0) Drain- gate Voltage (R GS = 20 k) Gate-source Voltage Drain Current (continuous) at Tc = 25 C Drain Current (continuous) at Tc = 100 oC Drain Current (pulsed) Total Dissipation at Tc = 25 C Derating F actor dv/dt(1) T stg Tj July 1998 Peak Diode Recovery voltage slope Storage T emperature Max. O perating Junction Temperature
o o
IPAK TO-251 (Suffix "-1")
DPAK TO-252
(Suffix "T4")
INTERNAL SCHEMATIC DIAGRAM
Value 100 100 20 16 11 64 50 0.33 7 -65 to 175 175
(1) ISD 16 A, di/dt 200 A/s, VDD V(BR)DSS, Tj TJMAX
Uni t V V V A A A W W/ o C V/ ns
o o
C C 1/9
(*) Pulse width limited by safe operating area
STD16NE10
THERMAL DATA
R t hj-ca se
Rthj -amb
R thc- si nk Tl
Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose
3.0 100 1.5 275
C/W oC/W o C/W o C
o
AVALANCHE CHARACTERISTICS
Symb ol I AR E AS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, < 1%) Single Pulse Avalanche Energy (starting Tj = 25 o C, I D = IAR , VDD = 30 V) Max Valu e 16 75 Unit A mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 oC unless otherwise specified) OFF
Symb ol V (BR)DSS I DSS Parameter Drain-source Breakdown Voltage Test Cond ition s I D = 250 A V GS = 0 Min. 100 1 10 100 Typ . Max. Un it V A A nA
Zero G ate Voltage V DS = Max Rating Drain Current (VGS = 0) V DS = Max Rating o C Gate-body Leakage Current (V DS = 0) V GS = 20 V
T c = 125
I GSS
ON ()
Symb ol V GS(th) R DS( on) ID(o n) Parameter Gate Threshold Voltage V DS = VGS Test Cond ition s ID = 250 A ID = 8 A 16 Min. 2 Typ . 3 0.07 Max. 4 0.1 Un it V A
Static Drain-source On V GS = 10V Resistance
On State Drain Current V DS > I D(on) x R DS(on) max V GS = 10 V
DYNAMIC
Symb ol g fs () C iss C oss C rss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse T ransfer Capacitance Test Cond ition s V DS > I D(on) x R DS(on) max V DS = 25 V f = 1 MHz I D =8 A VGS = 0 Min. 5 1600 180 50 2100 250 70 Typ . Max. Un it S pF pF pF
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STD16NE10
ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON
Symb ol t d(on) tr Qg Q gs Q gd Parameter Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Cond ition s V DD = 50 V ID = 10 A VGS = 10 V R G =4.7 (see test circuit, figure 3) V DD = 80 V I D = 20 A V GS = 10 V Min. Typ . 17 37 38 10 12 Max. 23 50 50 Un it ns ns nC nC nC
SWITCHING OFF
Symb ol t r(Vof f) tf tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Cond ition s V DD = 80 V I D = 20 A R G =4.7 VGS = 10 V (see test circuit, figure 5) Min. Typ . 11 18 32 Max. 15 25 44 Un it ns ns ns
SOURCE DRAIN DIODE
Symb ol I SD I SDM (*) V SD () t rr Q rr I RRM Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 16 A V GS = 0 110 440 8 Test Cond ition s Min. Typ . Max. 16 64 1.5 Un it A A V ns C A
di/dt = 100 A/s I SD = 20 A o Tj = 150 C V DD = 50 V (see test circuit, figure 5)
() Pulsed: Pulse duration = 300 s, duty cycle 1.5 % (*) Pulse width limited by safe operating area
Safe Operating Area
Thermal Impedance
3/9
STD16NE10
Output Characteristics Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/9
STD16NE10
Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/9
STD16NE10
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
6/9
STD16NE10
TO-251 (IPAK) MECHANICAL DATA
DIM. MIN. A A1 A3 B B2 B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 0.017 0.019 0.236 0.252 0.173 0.626 0.354 0.031 0.031 2.2 0.9 0.7 0.64 5.2 mm TYP. MAX. 2.4 1.1 1.3 0.9 5.4 0.85 0.012 0.037 0.023 0.023 0.244 0.260 0.181 0.641 0.370 0.047 0.039 MIN. 0.086 0.035 0.027 0.025 0.204 inch TYP. MAX. 0.094 0.043 0.051 0.031 0.212 0.033
H C A C2 L2 D B3 B6 A1 L
= =
3
B5
B
A3
=
B2
=
G
=
E
L1
1
2
=
0068771-E
7/9
STD16NE10
TO-252 (DPAK) MECHANICAL DATA
mm MIN. A A1 A2 B B2 C C2 D E G H L2 L4 0.6 2.2 0.9 0.03 0.64 5.2 0.45 0.48 6 6.4 4.4 9.35 0.8 1 0.023 TYP. MAX. 2.4 1.1 0.23 0.9 5.4 0.6 0.6 6.2 6.6 4.6 10.1 MIN. 0.086 0.035 0.001 0.025 0.204 0.017 0.019 0.236 0.252 0.173 0.368 0.031 0.039 inch TYP. MAX. 0.094 0.043 0.009 0.035 0.212 0.023 0.023 0.244 0.260 0.181 0.397
DIM.
H
A
C2
C
DETAIL "A"
A1
L2
D DETAIL "A" B
=
=
3
B2
=
=
G
E
2
L4
1
=
=
A2
0068772-B
8/9
STD16NE10
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical compone nts in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. .
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