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19-1815; Rev 0; 10/00
KIT ATION EVALU LE B AVAILA
Low-Jitter, 10-Port LVDS Repeater
General Description Features
o Ultra-Low 120psp-p (max) Total Jitter (Deterministic and Random) o 100ps (max) Skew Between Channels o Guaranteed 400Mbps Data Rate o 60A Shutdown Supply Current o Conforms to EIA/TIA-644 LVDS Standard o Single +3.3V Supply o Fail-Safe Circuit Sets Output High for Undriven Inputs o High-Impedance LVDS Input when VCC = 0
MAX9150
The MAX9150 low-jitter, 10-port, low-voltage differential signaling (LVDS) repeater is designed for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The device accepts a single LVDS input and repeats the signal at 10 LVDS outputs. Each differential output drives a total of 50, allowing point-to-point distribution of signals on transmission lines with 100 terminations on each end. Ultra-low 120ps (max) peak-to-peak jitter (deterministic and random) ensures reliable communication in highspeed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 400Mbps data rate and less than 100ps skew between channels while operating from a single +3.3V supply. Supply current at 400Mbps is 160mA (max) and is reduced to 60A (max) in low-power shutdown mode. Inputs and outputs conform to the EIA/TIA-644 LVDS standard. A fail-safe feature sets the outputs high when the input is undriven and open, terminated, or shorted. The MAX9150 is available in a 28-pin TSSOP package. Refer to the MAX9110/MAX9112 and MAX9111/MAX9113 data sheets for LVDS line drivers and receivers.
Ordering Information
PART MAX9150EUI TEMP. RANGE -40C to +85C PIN-PACKAGE 28 TSSOP
Pin Configuration ________________________Applications
Cellular Phone Base Stations Add/Drop Muxes Digital Crossconnects Network Switches/Routers Backplane Interconnect Clock Distribution
DO2+ 1 DO2- 2 DO1+ 3 DO1- 4 PWRDN 5
TOP VIEW MAX9150
28 DO3+ 27 DO326 DO4+ 25 DO424 DO5+ 23 DO522 VCC 21 GND 20 DO6+ 19 DO618 DO7+ 17 DO716 DO8+ 15 DO8-
Typical Application Circuit
GND 6 RIN+ 7 RIN- 8
LVDS
MAX9150
LVDS TX 100
GND 9
RX
1
100 100
VCC 10 DO10+ 11 DO10- 12
BACKPLANE OR CABLE
MAX9111
10
100 100
MAX9110
RX
DO9+ 13 DO9- 14
MAX9111
TSSOP
________________________________________________________________ Maxim Integrated Products
1
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Low-Jitter, 10-Port LVDS Repeater MAX9150
ABSOLUTE MAXIMUM RATINGS
VCC to GND ...........................................................-0.3V to +4.0V RIN+, RIN- to GND ................................................-0.3V to +4.0V PWRDN to GND..........................................-0.3V to (VCC + 0.3V) DO_+, DO_-...........................................................-0.3V to +4.0V Short-Circuit Duration (DO_+, DO_-) .........................Continuous Continuous Power Dissipation (TA = +70C) 28-Pin TSSOP (derate 12.8mW/C above +70C) .....1026mW Storage Temperature.........................................-65C to +150C Maximum Junction Temperature .....................................+150C Operating Temperature Range...........................-40C to +85C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, RL = 50 1%, |VID| = 0.1V to 1.0V, VCM = |VID / 2| to 2.4V - |VID / 2|, PWRDN = high, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25C.) (Note 1)
PARAMETER P W RD N Input High Voltage Input Low Voltage Input Current LVDS INPUT Differential Input High Threshold Differential Input Low Threshold VTH VTL PWRDN = high or low; VRIN+ = 2.4V, RIN- = open or RIN+ = open, VRIN- = 2.4V PWRDN = high or low; VRIN+ = 0, RIN- = open or RIN+ = open, VRIN- = 0 VCC = 0; VRIN+ = 2.4V, RIN- = open or RIN+ = open, VRIN- = 2.4V VCC = +3.6V or 0, PWRDN = high or low Figure 1 Figure 1 Figure 1 Figure 1 Figure 1 Figure 1 VCC = +3.6V or 0, PWRDN = high or low RIN+, RIN- undriven with short, open, or 100 termination VID = +100mV, VDO_+ = GND VID = -100mV, VDO_- = GND 0.7 150 250 -15 240 330 450 0.90 1.25 -100 -6 -18 -1 5 250 320 450 25 1.375 25 1.6 7 -7 +1 A +1 +12 A k mV mV V mV V V mV mA 100 mV mV VIH VIL IIN VIN = VCC and 0 -15 2.0 0.8 15 V V A SYMBOL CONDITIONS MIN TYP MAX UNITS
Single-Ended Input Current
IIN
Power-Off Single-Ended Input Current Differential Input Resistance LVDS DRIVER Differential Output Voltage Change in VOD Between Complementary Output States Offset (Common-Mode) Voltage Change in VOS Between Complementary Output States Output High Voltage Output Low Voltage Differential Output Resistance (Note 2) Differential High Output Voltage in Fail-Safe Output Short-Circuit Current
IIN(OFF) RIDIFF VOD VOD VOS VOS VOH VOL RODIFF VOD+ ISC
2
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Low-Jitter, 10-Port LVDS Repeater
DC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, RL = 50 1%, |VID| = 0.1V to 1.0V, VCM = |VID / 2| to 2.4V - |VID / 2|, PWRDN = high, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25C.) (Note 1)
PARAMETER SYMBOL CONDITIONS VCC = 0, PWRDN = GND; VDO_+ = 3.6V or 0, DO_- = open; or VDO_- = 3.6V or 0, DO_+ = open IOZ PWRDN = GND; VDO_+ = 3.6V or 0, DO_- = open; or VDO_- = 3.6V or 0, DO_+ = open DC 200MHz (400Mbps) PWRDN = GND MIN -1 TYP MAX +1 UNITS A
MAX9150
Single-Ended Output HighImpedance Current
-1
+1
A
SUPPLY CURRENT Supply Current (Note 2) Power-Down Supply Current ICC ICCZ Figure 2 100 130 140 160 60 mA A
AC ELECTRICAL CHARACTERISTICS
(VCC = +3.0V to +3.6V, RL = 50 1%, CL = 5pF, |VID| = 0.2V to 1.0V, VCM = |VID / 2| to 2.4V - |VID / 2|, PWRDN = high, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25C.) (Notes 2-5)
PARAMETER Differential Propagation Delay High-to-Low Differential Propagation Delay Low-to-High Total Peak-to-Peak Jitter (Random and Deterministic) (Note 6) Differential Output-to-Output Skew (Note 7) Differential Part-to-Part Skew (Note 8) Rise/Fall Time Maximum Input Frequency (Note 9) SYMBOL tPHLD tPLHD Figures 2, 3 Figures 2, 3 CONDITIONS MIN 1.6 1.6 TYP 2.2 2.2 MAX 3.5 3.5 UNITS ns ns
tJPP
Figures 2, 3
20
120
psp-p
tSKOO tSKPP TTLH, tTHL fMAX
Figures 2, 3 Figures 2, 3 Figures 2, 3 Figures 2, 3 150 400
40
100 1.9
ps ns ps Mbps
220
450
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Low-Jitter, 10-Port LVDS Repeater MAX9150
AC ELECTRICAL CHARACTERISTICS (continued)
(VCC = +3.0V to +3.6V, RL = 50 1%, CL = 5pF, |VID| = 0.2V to 1.0V, VCM = |VID / 2| to 2.4V - |VID / 2|, PWRDN = high, TA = -40C to +85C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25C.) (Notes 2-5)
PARAMETER Power-Down Time Power-Up Time SYMBOL tPD tPU Figures 4, 5 CONDITIONS MIN TYP MAX 100 100 UNITS ns s
Note 1: Current-into-device pins is defined as positive. Current-out-of-device pins is defined as negative. All voltages are referenced to ground, except VTH, VTL, VOD, and VOD. Note 2: Guaranteed by design, not production tested. Note 3: AC parameters are guaranteed by design and characterization. Note 4: CL includes scope probe and test jig capacitance. Note 5: Signal generator conditions, unless otherwise noted: frequency = 200MHz, 50% duty cycle, RO = 50, tR = 1ns, and tF = 1ns (0% to 100%). Note 6: Signal generator conditions for tJPP: VOD = 200mV, VOS = 1.2V, frequency = 200MHz, 50% duty cycle, RO = 50, tR = 1ns, and tF = 1ns (0% to 100%. tJPP includes pulse (duty cycle) skew. Note 7: tSKOO is the magnitude difference in differential propagation delay between outputs for a same-edge transition. Note 8: tSKPP is the |MAX - MIN| differential propagation delay. Note 9: Device meets VOD and AC specifications while operating at fMAX.
Typical Operating Characteristics
(Figure 2, VCC = +3.3V, RL = 50, CL = 5pF, IVIDI = 200mV, VCM = 1.2V, fIN = 50MHz, TA = +25C, unless otherwise noted.)
DIFFERENTIAL PROPAGATION DELAY vs. SUPPLY VOLTAGE
MAX9150 toc01 MAX9150 toc02
SUPPLY CURRENT vs. FREQUENCY
150 140 SUPPLY CURRENT (mA) 130 120 110 100 90 0.1 1 100 10 INPUT FREQUENCY (MHz) 1000 2.40 DIFFERENTIAL PROPAGATION DELAY (ns) 2.35 2.30
DIFFERENTIAL PROPAGATION DELAY vs. OUTPUT LOAD
DIFFERENTIAL PROPAGATION DELAY (ns)
MAX9150 toc03
2.40 2.35 2.30 2.25 2.20 2.15 2.10 tPHLD tPLHD
tPLHD 2.25 2.20 2.15 2.10 3.0 3.1 3.2 3.3 VCC (V) 3.4 3.5 3.6
tPHLD
50
60
70 RL ()
80
90
100
4
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Low-Jitter, 10-Port LVDS Repeater MAX9150
Typical Operating Characteristics (continued)
(Figure 2, VCC = +3.3V, RL = 50, CL = 5pF, IVIDI = 200 mV, VCM = 1.2V, fIN = 50MHz, TA = +25C, unless otherwise noted.)
DIFFERENTIAL PROPAGATION DELAY vs. COMMON-MODE VOLTAGE
MAX9150 toc04
DIFFERENTIAL OUTPUT-TO-OUTPUT SKEW vs. SUPPLY VOLTAGE
DIFFERENTIAL OUTPUT-TO-OUTPUT SKEW (ps) H G B A, E F, I D C
A = D02 - D01 B = D03 - D01 C = D04 - D01 D = D05 - D01 E = D06 - D01 F = D07 - D01 G = D08 - D01 H = D09 - D01 I = D010 - D01
MAX9150 toc05
TRANSITION TIME vs. SUPPLY VOLTAGE
MAX9150 toc06
2.50 DIFFERENTIAL PROPAGATION DELAY (ns) 2.45 2.40 2.35 2.30 2.25 2.20 2.15 2.10 0 0.5 1.0 1.5 2.0 tPHLD tPLHD
40 30 20 10 0 -10 -20
215 210 TRANSITION TIME (ps) 205 200 195 190 185 tTHL
tTLH
2.5
3.0
3.1
3.2
3.3 VCC (V)
3.4
3.5
3.6
3.0
3.1
3.2
3.3 VCC (V)
3.4
3.5
3.6
VCM (V)
TRANSITION TIME vs. OUTPUT LOAD
MAX9150 toc07
TRANSITION TIME vs. CAPACITANCE
MAX9150 toc08
240 230 TRANSITION TIME (ps) 220 210 200 190 180 50 60 70 RL () 80 90 tTHL
600
tTLH
500 TRANSITION TIME (ps) tTLH 400 tTHL
300
200
100 100 5 7 9 CL (pF) 11 13 15
DIFFERENTIAL OUTPUT vs. SUPPLY VOLTAGE
MAX9150 toc09
DIFFERENTIAL OUTPUT vs. OUTPUT LOAD
MAX9150 toc10
335
570 520 470 420 370 320 270
DIFFERENTIAL OUTPUT (mV)
325
320
315
310 3.0 3.1 3.2 3.3 VCC (V) 3.4 3.5 3.6
DIFFERENTIAL OUTPUT (mV)
330
50
60
70 RL ()
80
90
100
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5
Low-Jitter, 10-Port LVDS Repeater MAX9150
Pin Description
PIN 1, 3, 11, 13, 16, 18, 20, 24, 26, 28 2, 4, 12, 14, 15, 17, 19, 23, 25, 27 5 6, 9, 21 10, 22 7 8 NAME DO2+, DO1+, DO10+, DO9+, DO8+, DO7+, DO6+, DO5+, DO4+, DO3+ DO2-, DO1-, DO10-, DO9-, DO8-, DO7-, DO6-, DO5-, DO4-, DO3PWRDN GND VCC RIN+ RINFUNCTION
Differential LVDS Outputs. Connect a 100 resistor across each of the output pairs (DO_+ and DO_-) adjacent to the IC, and connect a 100 resistor at the input of the receiving circuit.
Power Down. Drive PWRDN low to disable all outputs and reduce supply current to 60A. Drive PWRDN high for normal operation. Ground Power. Bypass each VCC pin to GND with 0.1F and 1nF ceramic capacitors. LVDS Receiver Inputs. RIN+ and RIN- are high-impedance inputs. Connect a resistor from RIN+ to RIN- to terminate the input signal.
Detailed Description
The LVDS interface standard is a signaling method intended for point-to-point communication over a controlled impedance medium, as defined by the ANSI/TIA/EIA-644 and IEEE 1596.3 standards. The LVDS standard uses a lower voltage swing than other common communication standards, achieving higher data rates with reduced power consumption while reducing EMI emissions and system susceptibility to noise. The MAX9150 is a 400Mbps, 10-port LVDS repeater intended for high-speed, point-to-point, low-power applications. This device accepts an LVDS input and repeats it on 10 LVDS outputs. The device is capable of detecting differential signals as low as 100mV and as high as 1V within a 0 to 2.4V input voltage range. The LVDS standard specifies an input voltage range of 0 to 2.4V referenced to ground. The MAX9150 outputs use a current-steering configuration to generate a 5mA to 9mA output current. This current-steering approach induces less ground bounce and no shoot-through current, enhancing noise margin and system speed performance. The driver outputs are short-circuit current limited, and are high impedance (to ground) when PWRDN = low or the device is not powered. The outputs have a typical differential resistance of 240. The MAX9150 current-steering architecture requires a resistive load to terminate the signal and complete the
transmission loop. Because the device switches the direction of current flow and not voltage levels, the output voltage swing is determined by the total value of the termination resistors multiplied by the output current. With a typical 6.4mA output current, the MAX9150 produces a 320mV output voltage when driving a transmission line terminated at each end with a 100 termination resistor (6.4mA x 50 = 320mV). Logic states are determined by the direction of current flow through the termination resistors.
Fail-Safe
Fail-safe is a receiver feature that puts the output in a known logic state (high) under certain fault conditions. The MAX9150 outputs are differential high when the inputs are undriven and open, terminated, or shorted (Table 1).
Table 1. Input/Output Function Table
INPUT, VID +100mV -100mV Open Short Terminated Undriven OUTPUTS, VOD High Low High High High
Note: VID = RIN+ - RIN-, VOD = DO_+ - DO_High = 450mV > VOD > 250mV Low = -250mV > VOD > -450mV
6
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Low-Jitter, 10-Port LVDS Repeater
Applications Information
Supply Bypassing
Bypass each of the VCC pins with high-frequency surface-mount ceramic 0.1F and 1nF capacitors in parallel as close to the device as possible, with the smaller valued capacitor closest to the VCC pins. tend to pick up noise as common mode, which is rejected by the LVDS receiver.
MAX9150
Termination
Termination resistors should match the differential characteristic impedance of the transmission line. Since the MAX9150 has current-steering devices, an output voltage will not be generated without a termination resistor. Output voltage levels are dependent upon the value of the total termination resistance. The MAX9150 produces LVDS output levels for point-to-point links that are double terminated (100 at each end). With the typical 6.4mA output current, the MAX9150 produces an output voltage of 320mV when driving a transmission line terminated at each end with a 100 termination resistor (6.4mA x 50 = 320mV). Termination resistance values may range between 90 and 150, depending on the characteristic impedance of the transmission medium. Minimize the distance between the output termination resistor and the corresponding MAX9150 transmitter output. Use 1% surface-mount resistors. Minimize the distance between the input termination resistor and the MAX9150 receiver input. Use a 1% surface-mount resistor.
Differential Traces
Output trace characteristics affect the performance of the MAX9150. Use controlled impedance traces to match trace impedance to both the transmission medium impedance and termination resistor. Ensure that noise couples as common mode by running the differential traces close together. Reduce skew by matching the electrical length of the traces. Excessive skew can result in a degradation of magnetic field cancellation. Maintain the distance between the differential traces to avoid discontinuities in differential impedance. Avoid 90 turns and minimize the number of vias to further prevent impedance discontinuities.
Cables and Connectors
Transmission media should have a controlled differential impedance of 100. Use cables and connectors that have matched differential impedance to minimize impedance discontinuities. Avoid the use of unbalanced cables, such as ribbon or simple coaxial cable. Balanced cables, such as twisted pair, offer superior signal quality and tend to generate less EMI due to canceling effects. Balanced cables
Chip Information
TRANSISTOR COUNT: 11,117 PROCESS : CMOS
Test Circuits and Timing Diagrams
DO1+ MAX9150 VOD 25 50 DO125 VOS
RIN+ GENERATOR RINVOD 50 25 25
DO10+
VOS DO10-
Figure 1. Driver-Load Test Circuit
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Low-Jitter, 10-Port LVDS Repeater MAX9150
Test Circuits and Timing Diagrams (continued)
MAX9150
CL 5pF DO1+ RL 50
50
CL 5pF
DO1-
RIN+ GENERATOR RIN-
CL 5pF DO10+ RL 50 CL 5pF DO10-
50
Figure 2. Repeater Propagation Delay and Transition Time Test Circuit
RINVCM RIN+ tPLHD 80% 50% 20% tTLH tTHL O VDIFF = (VDO_+) - (VDO_-) tPHLD 80% O 50% 20% 0 DIFFERENTIAL VID VCM
Figure 3. Propagation Delay and Transition Time Waveforms
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Low-Jitter, 10-Port LVDS Repeater
Test Circuits and Timing Diagrams (continued)
CL 5pF MAX9150
MAX9150
DO1+ RL 25 RL 25 DO1-
CL 5pF 1.1V 1.0V 1.1V 1.0V PWRDN 50 CL 5pF RIN+ RINCL 5pF
1.2V
DO10+ RL 25 RL 25 DO10-
1.2V
GENERATOR
Figure 4. Power-Up/Down Delay Test Circuit
PWRDN 1.5V 1.5V
3.0V
O tPD tPU VOH VDO_+ WHEN VID = +100mV VDO_- WHEN VID = -100mV 50% 50% 1.2V 1.2V VDO_+ WHEN VID = -100mV VDO_- WHEN VID = +100mV tPD 50% tPU 50% VOL
Figure 5. Power-Up/Down Delay Waveform
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9
Low-Jitter, 10-Port LVDS Repeater MAX9150
Package Information
TSSOP.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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