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PD- 91503C
IRFP150N
HEXFET(R) Power MOSFET
l l l l l
Advanced Process Technology Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Fully Avalanche Rated
D
VDSS = 100V RDS(on) = 0.036W
G S
Description
Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The TO-247 package is preferred for commercialindustrial applications where higher power levels preclude the use of TO-220 devices. The TO-247 is similar but superior to the earlier TO-218 package because of its isolated mounting hole.
ID = 42A
TO-247AC
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 srew
Max.
42 30 140 160 1.1 20 420 22 16 5.0 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A W W/C V mJ A mJ V/ns C
Thermal Resistance
Parameter
RqJC RqCS RqJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.24 ---
Max.
0.95 --- 40
Units
C/W
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1
IRFP150N
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
DV(BR)DSS/DTJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
Min. 100 --- --- 2.0 14 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.11 --- --- --- --- --- --- --- --- --- --- 11 56 45 40 5.0 13 1900 450 230
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.036 W VGS = 10V, ID = 23A 4.0 V VDS = VGS, ID = 250A --- S VDS = 25V, ID = 22A 25 VDS = 100V, VGS = 0V A 250 VDS = 80V, VGS = 0V, TJ = 150C 100 VGS = 20V nA -100 VGS = -20V 110 ID = 22A 15 nC VDS = 80V 58 VGS = 10V, See Fig. 6 and 13 --- VDD = 50V --- ID = 22A ns --- RG = 3.6W --- RD = 2.9W See Fig. 10 , Between lead, --- 6mm (0.25in.) nH G from package --- and center of die contact --- VGS = 0V --- pF VDS = 25V --- = 1.0MHz, See Fig. 5
D
S
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 42 --- --- showing the A G integral reverse --- --- 140 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS =23A, VGS = 0V --- 180 270 ns TJ = 25C, IF = 22A --- 1.2 1.8 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width 300s; duty cycle 2%.
Uses IRF1310N data and test conditions
Starting TJ = 25C, L = 1.7mH
RG = 25W , IAS = 22A. (See Figure 12)
I 22A, di/dt 180A/s, VDD V(BR)DSS, SD
TJ 175C
2
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IRFP150N
1000
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
10
10
4.5V
4.5V
20us PULSE WIDTH TJ = 25 oC
1 10 100
1 0.1
1 0.1
20us PULSE WIDTH TJ = 175 o C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 36A
I D , Drain-to-Source Current (A)
2.5
100
TJ = 25 o C TJ = 175 o C
2.0
1.5
10
1.0
0.5
1 4.0
5.0
6.0
7.0
8.0
9.0
10.0
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature (o C)
Fig 3. Typical Transfer Characteristics
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Fig 4. Normalized On-Resistance Vs. Temperature
3
IRFP150N
3500
3000
VGS , Gate-to-Source Voltage (V)
VGS = Ciss = Crss = Coss =
0V, f = 1MHz Cgs + Cgd , Cds SHORTED Cgd Cds + Cgd
20
ID = 22A VDS = 80V VDS = 50V VDS = 20V
16
C, Capacitance (pF)
2500
Ciss
2000
12
1500
8
1000
Coss Crss
4
500
0 1 10 100
0 0 20 40 60
FOR TEST CIRCUIT SEE FIGURE 13
80 100 120
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
I D , Drain Current (A)
100
100
10us
10
100us
10
1ms
1
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4 1.6
1 1
TC = 25 o C TJ = 175 o C Single Pulse
10
10ms
100
1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
4
Fig 8. Maximum Safe Operating Area
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IRFP150N
50
VDS
40
RD
VGS RG
D.U.T.
+
I D , Drain Current (A)
-VDD
30
10V
20
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
10
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
td(on) tr t d(off) tf
Fig 9. Maximum Drain Current Vs. Case Temperature
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) P DM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.001 0.01 0.1 1
0.01 0.00001
0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFP150N
1000
EAS , Single Pulse Avalanche Energy (mJ)
15V
800
ID 9.0A 16A BOTTOM 22A TOP
VDS
L
D R IVE R
600
RG
20V
D .U .T
IA S tp
+ V - DD
400
A
0 .01
200
Fig 12a. Unclamped Inductive Test Circuit
0 25 50 75 100 125 150 175
V (B R )D S S tp
Starting TJ , Junction Temperature o C) (
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
10 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
6
Fig 13b. Gate Charge Test Circuit
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IRFP150N
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS
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IRFP150N Package Outline
TO-247AC Outline Dimensions are shown in millimeters (inches)
15.90 (.626) 15.30 (.602) -B3.65 (.143) 3.55 (.140) 0.25 (.010) M -A5.50 (.217) 20.30 (.800) 19.70 (.775) 1 2 3 -C14.80 (.583) 14.20 (.559) 4.30 (.170) 3.70 (.145)
LE A D A S S IG N M E N TS 1 2 3 4 G A TE D R A IN SOURCE D R A IN
-DDBM 5.30 (.209) 4.70 (.185) 2.50 (.089) 1.50 (.059) 4
2X
5.50 (.217) 4.50 (.177)
NOTES: 1 D IM E N S IO N IN G & TO LE R A N C IN G P E R A N S I Y 14.5M , 1982. 2 C O N TR O LLIN G D IM E N S IO N : IN C H . 3 C O N F O R M S TO JE D E C O U TLIN E T O -247-A C .
2.40 (.094) 2.00 (.079) 2X 5.45 (.215) 2X
1.40 (.056) 3X 1.00 (.039) 0.25 (.010) M 3.40 (.133) 3.00 (.118) C AS
0.80 (.031) 3X 0.40 (.016) 2.60 (.102) 2.20 (.087)
Part Marking Information
TO-247AC
E X A M P L E : TH IS IS A N IR F P E 3 0 W ITH A S S E M B L Y LOT CODE 3A1Q
A
IN TE R N A TIO N A L R E C T IF IE R LOGO ASSEMBLY LOT CODE
PART NUMBER IR F P E 3 0 3A 1 Q 9 3 0 2 D A TE C O D E (Y YW W ) YY = YEAR W W W EEK
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 838 4630 IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936 http://www.irf.com/ Data and specifications subject to change without notice. 10/98
8
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