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PD - 91540C
IRLMS1902
HEXFET(R) Power MOSFET
l l l l
Generation V Technology Micro6 Package Style Ultra Low RDS(on) N-Channel MOSFET
D D G
1
6
A D D S
VDSS = 20V
2
5
3
4
Description
Fifth Generation HEXFET(R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET(R) power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The Micro6 package with its customized leadframe produces a HEXFET(R) power MOSFET with RDS(on) 60% less than a similar size SOT-23. This package is ideal for applications where printed circuit board space is at a premium. It's unique thermal design and RDS(on) reduction enables a current-handling increase of nearly 300% compared to the SOT-23.
RDS(on) = 0.10
Top View
Micro6
Absolute Maximum Ratings
Parameter
ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C VGS dv/dt TJ, TSTG Continuous Drain Current, VGS @ 4.5V Continuous Drain Current, VGS @ 4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range
Max.
3.2 2.6 18 1.7 13 12 5.0 -55 to + 150
Units
A W
mW/C
V V/ns C
Thermal Resistance Ratings
Parameter
RJA Maximum Junction-to-Ambient
Min.
Typ.
Max
75
Units
C/W
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3/18/04
IRLMS1902
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss
Min. Typ. Max. Units Conditions 20 V VGS = 0V, ID = 250A 0.032 V/C Reference to 25C, ID = 1mA 0.10 VGS = 4.5V, ID = 2.2A 0.17 VGS = 2.7V, ID = 1.1A 0.70 V VDS = VGS, ID = 250A 3.2 S VDS = 10V, ID = 1.1A 1.0 VDS = 16V, VGS = 0V A 25 VDS = 16V, VGS = 0V, TJ = 125C 100 VGS = 12V nA -100 VGS = -12V 4.7 7.0 ID = 2.2A 0.97 1.5 nC VDS = 16V 1.8 2.6 VGS = 4.5V, See Fig. 6 and 9 7.0 VDD = 10V 11 ID = 2.2A ns 12 RG = 6.0 4.0 RD = 4.4, See Fig. 10 300 VGS = 0V 120 pF VDS = 15V 50 = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge
Min. Typ. Max. Units 40 37 1.7 18 1.2 60 55 V ns nC A
Conditions MOSFET symbol showing the G integral reverse p-n junction diode. TJ = 25C, IS = 2.2A, VGS = 0V TJ = 25C, IF = 2.2A di/dt = 100A/s
D
S
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 ) TJ 150C
Pulse width 300s; duty cycle 2%. Surface mounted on FR-4 board, t 5sec.
ISD 2.2A, di/dt 110A/s, VDD V(BR)DSS,
2
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IRLMS1902
100
VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.50V 2.00V BOTTOM 1.75V TOP
100
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 7.50V 5.00V 4.00V 3.50V 3.00V 2.50V 2.00V BOTTOM 1.75V TOP
10
10
1
1
1.75V
1.75V
0.1 0.1
20s PULSE WIDTH TJ = 25 C
1 10
0.1 0.1
20s PULSE WIDTH TJ = 150 C
1 10
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
2.0
TJ = 25 C
10
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 2.2A
I D , Drain-to-Source Current (A)
1.5
TJ = 150 C
1.0
1
0.5
0.1 1.5
V DS = 10V 20s PULSE WIDTH 2.0 2.5 3.0 3.5 4.0 4.5 5.0
0.0 -60 -40 -20
VGS = 4.5V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRLMS1902
600
500
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
10
ID = 2.2A VDS = 16V
8
C, Capacitance (pF)
400
Ciss
300
6
4
200
Coss Crss
100
2
0 1 10 100
0 0 2 4
FOR TEST CIRCUIT SEE FIGURE 9
6 8
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
100
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
10
I D , Drain Current (A)
10
100us
TJ = 150 C
1ms 1
TJ = 25 C
1
10ms
0.1 0.4
V GS = 0 V
0.6 0.8 1.0 1.2 1.4
0.1 1
TC = 25 C TJ = 150 C Single Pulse
10 100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRLMS1902
QG
VDS VGS RG 4.5V
RD
4.5V
VG
QGS
QGD
D.U.T.
+
- VDD
Charge
Pulse Width 1 s Duty Factor 0.1 %
Fig 9a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
Fig 10a. Switching Time Test Circuit
VDS
50K 12V .2F .3F
90%
D.U.T. VGS
3mA
+ V - DS
10% VGS
td(on)
IG ID
tr
t d(off)
tf
Current Sampling Resistors
Fig 9b. Gate Charge Test Circuit
100 D = 0.50
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJA )
0.20 10 0.10 0.05 0.02 1 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJA + TA 0.0001 0.001 0.01 0.1 1 10 100
PDM t1 t2
0.1 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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IRLMS1902
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 12. For N-channel HEXFET(R) power MOSFETs
6
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IRLMS1902
Package Outline
Micro6a
3.00 (.118 ) 2.80 (.111 )
LEAD ASSIGNMENTS
-BD D S
RECOMMENDED FOOTPRINT
2X 0.95 (.0375 ) 6X (1.06 (.042 )
1.75 (.068 ) 1.50 (.060 ) -A-
6 1
5 2
4 3
3.00 (.118 ) 2.60 (.103 )
6 1
5 2
4 3 2.20 (.087 )
0.95 ( .0375 ) 2X 6X
D 0.50 (.019 ) 0.35 (.014 )
D
G 6X 0.65 (.025 )
0.15 (.006 ) M C A S B S
0 -10 1.30 (.051 ) 0.90 (.036 ) -C0.15 (.006 ) MAX. 1.45 (.057 ) 0.90 (.036 ) 0.10 (.004 ) 6 SURFACES
O
O
6X
0.20 (.007 ) 0.09 (.004 )
0.60 (.023 ) 0.10 (.004 )
NOTES : 1. DIMENSIONING & TOLERANCING PER ANSI Y14.5M-1982. 2. CONTROLLING DIMENSION : MILLIMETER. 3. DIMENSIONS ARE SHOW N IN MILLIMETERS (INCHES).
Part Marking Information
Micro6a
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IRLMS1902
Tape & Reel Information
Micro6a
8mm
4mm
FEED DIRECTION
NOTES : 1. OUTLINE CONFORMS TO EIA-481 & EIA-541.
178.00 ( 7.008 ) MAX.
9.90 ( .390 ) 8.40 ( .331 ) NOTES: 1. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 03/04
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