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Dual Modulus Prescaler
These devices are two-modulus prescalers which will divide by 5 and 6, 8 and 9, and 10 and 11, respectively. A MECL-to-MTTL translator is provided to interface directly with the MC12014 Counter Control Logic. In addition, there is a buffered clock input and MECL bias voltage source. * MC12009 480 MHz (B5/6), MC12011 550 MHz (B8/9), MC12013 550 MHz (B10/11) * MECL to MTTL Translator on Chip
MC12009 MC12011 MC12013
MECL PLL COMPONENTS DUAL MODULUS PRESCALER
SEMICONDUCTOR TECHNICAL DATA
* * * * *
MECL and MTTL Enable Inputs 5.0 or -5.2 V Operation* Buffered Clock Input -- Series Input RC Typ, 20 Ohms and 4 pF VBB Reference Voltage 310 Milliwatts (Typ)
* When using a 5.0 V supply, apply 5.0 V to Pin 1 (VCCO ), Pin 6 (MTTL V CC ), Pin 16 (V CC ), and ground Pin 8 (V EE ). When using -5.2 V supply, ground Pin 1 (V CCO ), Pin 6 (MTTL V CC ), and Pin 16 (V CC ) and apply -5.2 V to Pin 8 (V EE ). If the translator is not required, Pin 6 may be left open to conserve dc power drain.
16 1
P SUFFIX PLASTIC PACKAGE CASE 648
PIN CONNECTIONS
VCCO Q 1 2 3 4 5 6 7 8 (Top View) 16 VCC 15 Clock 14 VBB 13 E1 MECL 12 E2 MECL 11 E3 MECL 10 E4 MECL 9 E5 MECL
MAXIMUM RATINGS
Characteristic Symbol Rating Unit
Q (-) (+) MTTL VCC -8.0 0 to VEE Vdc Vdc mAdc MTTL Output VEE
(Ratings above which device life may be impaired) Power Supply Voltage (VCC = 0) Input Voltage (VCC = 0) Output Source Current Continuous Surge Storage Temperature Range VEE Vin IO
t50 t100
-65 to +175
Tstg
C
(Recommended Maximum Ratings above which performance may be degraded) Operating Temperature Range MC12009, MC12011, MC12013 DC Fan-Out (Note 1) (Gates and Flip-Flops) TA n -30 to +85 70 C Device --
ORDERING INFORMATION
Operating Temperature Range Package
MC12009P MC12011P MC12013P TA = - 35 to +85C Plastic
NOTES: 1. AC fan-out is limited by desired system performance. 2. ESD data available upon request.
(c) Motorola, Inc. 1997
Rev 2
MC12009 MC12011 MC12013
Figure 1. Logic Diagrams
MC12009
MTTL E5 9 MTTL E4 10 MECL E3 11 MECL E2 12 MECL E1 13
D
Q1
D
Q2
D
Q3
C
Q1
C
C
Q3 VBB
MECL to MTTL Trans- lator
Recommended Circuitry For ac coupled Inputs. 15 1000 pF Clock Input 1k 0.1 F
14
3 Q3
2 Q3
54 +-
7 MTTL Out
MC12011
MTTL E5 9 MTTL E4 10 MECL E3 11 MECL E2 12 MECL E1 13 15
D
Q1
D
Q2
D
Q3
C
C
C VBB 0.1 F 14
Q4 Toggle Flip Flop C Q4
MECL to MTTL Trans- lator
Recommended Circuitry For ac coupled Inputs. 1000 pF Clock Input 1k
32 Q4 Q4
54 +-
7 MTTL Out
MC12013 / 10 for one or all E1 thru E5 high / 11 for all E1 thru E5 low Tie unused gate inputs low. MTTL E5 9 MTTL E4 10 MECL E3 11 MECL E2 12 MECL E1 13 Pull-down resistors required on Pins 2, 3 when not connected to translator. Basic IC Capability: / 10/11 15 1000 pF Clock Input 1k C C C VBB 0.1 F 14 3254 Q4 Q4 + - 7 MTTL Out D Q1 D Q2 D Q3 Q4 Toggle Flip Flop C Q4 MECL to MTTL Trans- lator
Recommended Circuitry For ac coupled Inputs.
Figure 2. Typical Frequency Synthesizer Application
fref Phase Detector MC4044 Low-Pass Filter Voltage-Controlled Oscillator MC1648 fout
Modulus Enable Line Counter Control Logic MC12014 Zero Detect Line fout MC12009 MC12011 MC12013
BNp Programmable
Counter MC4016 Counter Reset Line
BA Programmable
Counter MC4016
2
MOTOROLA RF/IF DEVICE DATA
MC12009 MC12011 MC12013
ELECTRICAL CHARACTERISTICS (Supply Voltage = -5.2 V, unless otherwise noted.)
Test Limits Pin Pi Under Test 8 6 15 11 12 13 4 5 5 9 10 15 11 12 13 9 10 14 2 3 7 2 3 7 2 3 2 3 -1.120 -1.120 -1.655 -1.655 -1.100 -1.100 -2.8 -1.990 -1.990 -1.675 -1.675 -4.26 -1.020 -1.020 -1.630 -1.630 -0.890 -0.890 -10 -10 -10 -10 -1.6 -1.6 1.7 1.7 0.7 -30C Min -88 5.2 375 375 375 375 6.0 6.0 3.0 100 100 -10 -10 -10 -10 -1.6 -1.6 -1.360 -1.000 -1.000 -2.6 -1.950 -1.950 -1.650 -1.650 -4.40 -0.950 -0.950 -1.595 -1.595 -1.160 -0.810 -0.810 -0.930 -0.930 -2.4 -1.925 -1.925 -1.615 -1.615 -4.48 Vdc Vdc mAdc VIHmax VILmin Vdc -0.700 -0.700 2.0 2.0 1.0 Max Min -80 5.2 250 250 250 250 6.0 6.0 3.0 100 100 -10 -10 -10 -10 -1.6 -1.6 2.0 2.0 1.0 +25C Max Min -80 5.2 250 250 250 250 6.4 6.4 3.6 100 100 Adc Adc +85C Max Unit mAdc mAdc Adc
Characteristic Power Supply Drain Current pp y
Symbol ICC1 ICC2 IinH1
Input Current
IinH2 IinH3 IinH4 Leakage Current IinL1
mAdc
IinL2 Reference Voltage Logic `1' Output Voltage VBB VOH1 (Note 1) VOH2 Logic `0' Output Voltage VOL1 (Note 1) VOL2 Logic `1' Threshold Voltage Logic `0' Threshold Voltage VOHA (Note 2) VOLA (Note 3)
mAdc Vdc Vdc
Short Circuit Current IOS 7 -65 -20 -65 -20 -65 -20 1. Test outputs of the device must be tested by sequencing through the truth table. All input, power supply and Clock Input ground voltages must be maintained between tests. The clock input is the waveform shown. 2. In addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. The clock input is the waveform shown. 3. In addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. The clock input is the waveform shown.
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50 resistor to -2.0 V. Test procedures are shown for only one gate. The other gates are tested in the same manner.
MOTOROLA RF/IF DEVICE DATA
3
MC12009 MC12011 MC12013
ELECTRICAL CHARACTERISTICS (Supply Voltage = -5.2 V, unless otherwise noted.) (continued)
TEST VOLTAGE/CURRENT VALUES Volts @ Test Temperature -30C +25C +85C Pin Under Test 8 6 15 11 12 13 4 5 5 9 10 15 11 12 13 9 10 14 2 3 7 2 3 7 2 3 2 3 4 5 11,12,13 11,12,13 4 11,12,13 11,12,13 5 11,12,13 11,12,13 11,12,13 11,12,13 7 Clock Input VIHmax VILmin 9,10 9,10 9,10 9,10 9 10 4 15 11 12 13 5 5 4 4 4 5 9 10 5 VIHmax -0.890 -0.810 -0.700 VILmin -1.990 -1.950 -1.925 VIHAmin -1.205 -1.105 -1.035 VILAmax -1.500 -1.475 -1.440 VIH -2.8 -2.8 -2.8 VILH -4.7 -4.7 -4.7
TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax VILmin VIHAmin VILAmax VIH VIL Gnd Gd 1,16 6 1,16 1,16 1,16 1,16 6 6 6 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 6 1,16 1,16 6 1,16 1,16 1,16 1,16 6
Characteristic Power Supply Drain Current
Symbol ICC1 ICC2
Input Current
IinH1
IinH2 IinH3 IinH4 Leakage Current IinL1
IinL2 Reference Voltage Logic `1' Output Voltage VBB VOH1 (Note 1.) VOH2 Logic `0' Output Voltage VOL1 (Note 1.) VOL2 Logic `1' Threshold Voltage Logic `0' Threshold Voltage VOHA (Note 2.) VOLA (Note 3.)
Short Circuit Current IOS 7 5 4 1. Test outputs of the device must be tested by sequencing through the truth table. All input, power supply and ground voltages must be maintained between tests. The clock input is the waveform shown. 2. In addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. The clock input is the waveform shown. 3. In addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. The clock input is the waveform shown.
4
MOTOROLA RF/IF DEVICE DATA
MC12009 MC12011 MC12013
ELECTRICAL CHARACTERISTICS (Supply Voltage = -5.2 V, unless otherwise noted.) (continued)
TEST VOLTAGE/CURRENT VALUES Volts @ Test Temperature -30C +25C +85C Pin Under Test 8 6 15 11 12 13 4 5 5 9 10 15 11 12 13 9 10 14 2 3 7 2 3 7 2 3 2 3 9,10 9,10 9,10 9,10 9,10 9,10 9,10 VIHT -3.2 -3.2 -3.2 VILT -4.4 -4.4 -4.4 VEE -5.2 -5.2 -5.2 IL -0.25 -0.25 -0.25 mA IOL 16 16 16 IOH -0.40 -0.40 -0.40
TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHT VILT VEE 8 8 8 8 8 8 8 8 8 8 8 8,15 8,11 8,12 8,13 8 8 8 8 8 8 8 8 8 8 8 8 8 7 7 14 IL IOL IOH Gnd Gd 1,16 6 1,16 1,16 1,16 1,16 6 6 6 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 6 1,16 1,16 6 1,16 1,16 1,16 1,16 6 Clock Input VIHmax VILmin
Characteristic Power Supply Drain Current
Symbol ICC1 ICC2
Input Current
IinH1
IinH2 IinH3 IinH4 Leakage Current IinL1
IinL2 Reference Voltage Logic `1' Output Voltage VBB VOH1 (Note 1.) VOH2 Logic `0' Output Voltage VOL1 (Note 1.) VOL2 Logic `1' Threshold Voltage Logic `0' Threshold Voltage VOHA (Note 2.) VOLA (Note 3.)
Short Circuit Current IOS 7 8 1. Test outputs of the device must be tested by sequencing through the truth table. All input, power supply and ground voltages must be maintained between tests. The clock input is the waveform shown. 2. In addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. The clock input is the waveform shown. 3. In addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. The clock input is the waveform shown.
MOTOROLA RF/IF DEVICE DATA
5
MC12009 MC12011 MC12013
ELECTRICAL CHARACTERISTICS (Supply Voltage = 5.0 V, unless otherwise noted.)
Test Limits Pin Pi Under Test 8 6 15 11 12 13 4 5 5 9 10 15 11 12 13 9 10 14 2 3 7 2 3 7 2 3 2 3 3.880 3.880 3.405 3.405 3.900 3.900 2.4 3.070 3.070 3.385 3.385 0.94 3.980 3.980 3.430 3.430 4.110 4.110 -10 -10 -10 -10 -1.6 -1.6 1.7 1.7 0.7 -30C Min -88 5.2 375 375 375 375 6.0 6.0 3.0 2.0 2.0 1.0 100 100 -10 -10 -10 -10 -1.6 -1.6 3.67 4.000 4.000 2.6 3.110 3.110 3.410 3.410 0.80 4.050 4.050 3.465 3.465 3.87 4.190 4.190 4.070 4.070 2.8 3.135 3.135 3.445 3.445 0.72 Vdc Vdc mAdc VIHmax VILmin Vdc 4.300 4.300 Max Min -80 5.2 250 250 250 250 6.0 6.0 3.0 100 100 -10 -10 -10 -10 -1.6 -1.6 2.0 2.0 1.0 +25C Max Min -80 5.2 250 250 250 250 6.4 6.4 3.6 100 100 Adc Adc +85C Max Unit mAdc mAdc Adc
Characteristic Power Supply Drain Current pp y
Symbol ICC1 ICC2 IinH1
Input Current
IinH2 IinH3 IinH4 Leakage Current IinL1
mAdc
IinL2 Reference Voltage Logic `1' Output Voltage VBB VOH1 (Note 4.) VOH2 Logic `0' Output Voltage VOL1 (Note 4.) VOL2 Logic `1' Threshold Voltage Logic `0' Threshold Voltage VOHA (Note 5.) VOLA (Note 6.)
mAdc Vdc Vdc
Short Circuit Current IOS 7 -65 -20 -65 -20 -65 -20 4. Test outputs of the device must be tested by sequencing through the truth table. All input, power supply and Clock Input ground voltages must be maintained between tests. The clock input is the waveform shown. 5. In addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. The clock input is the waveform shown. 6. In addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. The clock input is the waveform shown.
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50 resistor to -2.0 V. Test procedures are shown for only one gate. The other gates are tested in the same manner.
6
MOTOROLA RF/IF DEVICE DATA
MC12009 MC12011 MC12013
ELECTRICAL CHARACTERISTICS (Supply Voltage = 5.0 V, unless otherwise noted.) (continued)
TEST VOLTAGE/CURRENT VALUES Volts @ Test Temperature -30C +25C +85C Pin Under Test 8 6 15 11 12 13 4 5 5 9 10 15 11 12 13 9 10 14 2 3 7 2 3 7 2 3 2 3 4 5 11,12,13 11,12,13 4 11,12,13 11,12,13 5 11,12,13 11,12,13 11,12,13 11,12,13 7 Clock Input VIHmax VILmin 9,10 9,10 9,10 9,10 9 10 4 15 11 12 13 5 5 4 4 4 5 9 10 5 VIHmax +4.110 +4.190 +4.300 VILmin +3.070 +3.110 +3.135 VIHAmin +3.795 +3.895 +3.965 VILAmax +3.500 +3.525 +3.560 VIH +2.4 +2.4 +2.4 VILH +0.5 +0.5 +0.5 (VEE) Gnd 8 8 8 8 8 8 8 8 8 8 8 8,15 8,11 8,12 8,13 8 8 8 8 8 8 8 8 8 8 8 8 8 8
TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax VILmin VIHAmin VILAmax VIH VIL
Characteristic Power Supply Drain Current
Symbol ICC1 ICC2
Input Current
IinH1
IinH2 IinH3 IinH4 Leakage Current IinL1
IinL2 Reference Voltage Logic `1' Output Voltage VBB VOH1 (Note 4.) VOH2 Logic `0' Output Voltage VOL1 (Note 4.) VOL2 Logic `1' Threshold Voltage Logic `0' Threshold Voltage VOHA (Note 5.) VOLA (Note 6.)
Short Circuit Current IOS 7 5 4 4. Test outputs of the device must be tested by sequencing through the truth table. All input, power supply and ground voltages must be maintained between tests. The clock input is the waveform shown. 5. In addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. The clock input is the waveform shown. 6. In addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. The clock input is the waveform shown.
MOTOROLA RF/IF DEVICE DATA
7
MC12009 MC12011 MC12013
ELECTRICAL CHARACTERISTICS (Supply Voltage = 5.0 V, unless otherwise noted.) (continued)
TEST VOLTAGE/CURRENT VALUES Volts @ Test Temperature -30C +25C +85C Pin Under Test 8 6 15 11 12 13 4 5 5 9 10 15 11 12 13 9 10 14 2 3 7 2 3 7 2 3 2 3 9,10 9,10 9,10 9,10 9,10 9,10 9,10 VIHT +2.0 +2.0 +2.0 VILT +0.8 +0.8 +0.8 VCC +5.0 +5.0 +5.0 IL -0.25 -0.25 -0.25 mA IOL 16 16 16 IOH -0.40 -0.40 -0.40 (VEE) Gnd 8 8 8 8 8 8 8 8 8 8 8 8,15 8,11 8,12 8,13 8 8 14 8 8 8 7 8 8 8 7 8 8 8 8 8 8 Clock Input VIHmax VILmin
TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHT VILT VCC 1,16 6 1,16 1,16 1,16 1,16 6 6 6 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 1,16 6 1,16 1,16 6 1,16 1,16 1,16 1,16 IL IOL IOH
Characteristic Power Supply Drain Current
Symbol ICC1 ICC2
Input Current
IinH1
IinH2 IinH3 IinH4 Leakage Current IinL1
IinL2 Reference Voltage Logic `1' Output Voltage VBB VOH1 (Note 4.) VOH2 Logic `0' Output Voltage VOL1 (Note 4.) VOL2 Logic `1' Threshold Voltage Logic `0' Threshold Voltage VOHA (Note 5.) VOLA (Note 6.)
Short Circuit Current IOS 7 6 4. Test outputs of the device must be tested by sequencing through the truth table. All input, power supply and ground voltages must be maintained between tests. The clock input is the waveform shown. 5. In addition to meeting the output levels specified, the device must divide by 5, 8 or 10 during this test. The clock input is the waveform shown. 6. In addition to meeting the output levels specified, the device must divide by 6, 9 or 11 during this test. The clock input is the waveform shown.
8
MOTOROLA RF/IF DEVICE DATA
MC12009 MC12011 MC12013
SWITCHING CHARACTERISTICS
MC12009, MC12011, MC12013 Pin Under Test 2 2 7 7 11 9 11 9 2 440 500 500 -- -- -- -- -- -- 480 550 550 -- -- -- -- -- -- 440 500 500 -- -- -- -- -- -- -30C Min -- -- -- -- 5.0 5.0 5.0 5.0 Typ -- -- -- -- -- -- -- -- Max 8.1 7.5 8.4 6.5 -- -- -- -- Min -- -- -- -- 5.0 5.0 5.0 5.0 +25C Typ -- -- -- -- -- -- -- -- Max 8.1 7.5 8.1 6.5 -- -- -- -- Min -- -- -- -- 5.0 5.0 5.0 5.0 +85C Typ -- -- -- -- -- -- -- -- Max 8.9 82 8.9 7.1 -- -- -- -- Unit U it ns Pulse Gen.1 15 15 A A 15 15 15 15 TEST VOLTAGES/WAVEFORMS APPLIED TO PINS LISTED BELOW: Pulse Gen.2 -- -- -- -- * -- * -- Pulse Gen.3 -- -- -- -- -- * -- * VIHmin Characteristic Ch t i ti Propagation Delay (See Figures 3 and 5) Symbol S bl t15+ 2+ t15+ 2- t5+ 7+ t5- 7- tsetup1 tsetup2 trel1 trel2 fmax
{
VILmin
{
VF -3.0 V 9,10 9,10 -- -- 9,10 * 9.10 *
VEE -3.0 V 8 8 8 8 8 8 8 8
VCC +2.0 1,6,16 1,6,16 1,6,16 1,6,16 1,6,16 1,6,16 1,6,16 1,6,16
-- -- -- -- -- -- -- --
11,12,13 11,12,13 -- -- * 11,12,13 * 11,12,13
Setup Time (See Figures 4 and 5) Release Time (See Figures 4 and 5) Toggle Frequency (See Figure 6) MC12009 : 5/6 MC12011 : 8/9 MC12013 : 10/11
ns ns ns ns MHz
-- -- --
-- -- --
-- -- --
11 11 11
-- -- --
-- -- --
8 8 8
16 16 16
*Test inputs sequentially, with Pulse Generator 2 or 3 as indicated connected to input under test, and the voltage indicated applied to the other input(s) of the same type ( i.e., MECL or MTTL).
-30C
+ 25C + 1.115 + 0.200
+ 85C + 1.20 + 0.235 Vdc Vdc
{VIHmin {VILmin
+ 1.03 + 0.175
Figure 3. AC Voltage Waveforms
Pulse Generator 1 t++ Q (Pin 2) 50% 80% 50% 20% VIHmin VILmin
t+ -
Q (Pin 3) 50%
+ In MTTL Out
50% t++ t--
-1.5 V
Figure 4. Setup and Release Time Waveforms
Pulse 50 Generator % 1 tsetup1 Pulse Generator tsetup2 2 Pulse Generator +1.5 V 3 Q (Pin 2) 80% 20% 80% 50% 90% 10% Divide by 5 -- MC12009 Divide by 8 -- MC12011 Divide by 10 -- MC12013 20% VIHmin VILmin VIHmin VILmin 0V VEE Pulse Generator 1 Pulse 50% Generator t rel2 2 Pulse Generator 3 -1.5 V Q (Pin 2) 80% 20% VIHmin VILmin VIHmin VILmin 0V VEE
50% trel1 80% 20% 90% 10%
Divide by 6 -- MC12009 Divide by 9 -- MC12011 Divide by 11 -- MC12013
MOTOROLA RF/IF DEVICE DATA
9
MC12009 MC12011 MC12013
Figure 5. AC Test Circuit
Vin VCC = +2.0 V Vout (Scope Channel B)
50 Pulse Generator #1
25 F
1
6
16
0.1 F
Vout
100
Vin
13 12
E1 E2 E3 E4 E5 C Q
2
Pulse Generator #2
50 100 Vin
11 10 9 15
3 Q
Vout
14 950 Pulse Generator #3 5 50 +
VBB 1950 7
4
-
MECL to MTTL Trans- lator 8
Vin (Scope Channel A) MC10109 or equiv. A
All Pulse Generators are EH 137 or equiv. Pulse Generators 1 and 2: PRF = 10 MHz PW = 50% Duty Cycle t + = t - = 2.0 0.2 ns Pulse Generator 3: PRF = 2.0 MHz PW = 50% Duty Cycle t + = t - = 5.0 0.5 ns
0.1 F VEE = -3.0 V
CT
50 VEE = -3.0 V
All resistors are + 1%. All input and output cables to the scope are equal lengths of 50-ohm coaxial cable. The 1950-ohm resistor at Pin 7 and the scope termination impedance constitute a 40 : 1 attenuator probe. CT = 15 pF = total parasitic capacitance which includes probe, wiring, and load capacitance. Unused output connected to a 50-ohm resistor to ground.
10
MOTOROLA RF/IF DEVICE DATA
MC12009 MC12011 MC12013
Figure 6. Maximum Frequency Test Circuit
VCC = +2.0 V 0.1 F 5.0 F Vout to Scope
1
16
13 E1 Vin (To Scope) VEE 11 E3 10 9 Sine Wave Input 0.1 F 15 C 1k 14 VBB 0.1 F 8 0.1 F VEE = -3.0 V
Unused output connected to a 50 resistor to ground
12 E2
Q
2
E4 E5 Q 3
800 mV Clock Input
DIVIDE BY 6
850 mV typ Q (Pin 2) 3 Cycles 3 Cycles
DIVIDE BY 9 800 mV Clock Input 850 mV typ Q (Pin 2) 5 Cycles 4 Cycles
DIVIDE BY 11 800 mV Clock Input 850 mV typ Q (Pin 2) 6 Cycles 5 Cycles
MOTOROLA RF/IF DEVICE DATA
11
MC12009 MC12011 MC12013
Figure 7. State Diagram
DIVIDE BY 5/6 (MC12009/MC12509)
Enable = 0
Q1 1 0 0 0 1 1
Q2 1 1 0 0 0 1
Q3 1 1 1 0 0 0
111
011
001
010
101
Enable = 1
110
100
000
Enable = 1 DIVIDE BY 8/9 (MC12011)
0101
0010
1000
1100
1010
Enable = 0
Q1 1 0 0 1 1 0 0 1 1
Q2 1 1 0 0 1 1 0 0 1
Q3 1 1 1 0 0 1 1 0 0
Q4 1 1 1 1 1 0 0 0 0
1110
0110
0000
0111
1111
Enable = 1
0001
1101 Enable = 1.
1001
0011
1011
0100
DIVIDE BY 10/11 (MC12013) 1110
Enable = 0
Q1 1 0 0 0 1 1 0 0 0 1 1
Q2 1 1 0 0 0 1 1 0 0 0 1
Q3 1 1 1 0 0 0 1 1 0 0 0
Q4 1 1 1 1 1 1 0 0 0 0 0
1101
0110
1001
0101
0010
Enable = 1
0001 0100 0011
1011
0000
1010
1000
NOTES: Enable = 1. The State of the Enable is important only for the positive Clock Transition when the counter is in state 1100.
0111
1100
1111
12
MOTOROLA RF/IF DEVICE DATA
MC12009 MC12011 MC12013
APPLICATIONS INFORMATION
The primary application of these devices is as a high-speed variable modulus prescaler in the divide by N section of a phase-locked loop synthesizer used as the local oscillator of two-way radios. Proper VHF termination techniques should be followed when the clock is separated from the prescaler by any appreciable distance. In their basic form, these devices will divide by 5/6, 8/9, or 10/11. Division by 5, 8, or 10 occurs when any one or all of the five gate inputs E1 through E5 are high. Division by 6, 9, or 11 occurs when all inputs E1 through E5 are low. (Unconnected MTTL inputs are normally high, unconnected MECL inputs are normally low). With the addition of extra parts, many different division configurations may be obtained (20/21, 40/41, 50/51, 100/101, etc.) A few of the many configurations are shown below, only for the MC12013.
Figure 8. Divide By 10/11 (MC12013)
13 E1 12 E2 11 E3 10 E4 9 E5 15 C 5 + MECL to MTTL Trans- lator Q4 3 Enable = 0 Q4 2
Q1 1 0 0 0 1 1 0 0 0 1 1
Q2 1 1 0 0 0 1 1 0 0 0 1
Q3 1 1 1 0 0 0 1 1 0 0 0
Q4 1 1 1 1 1 1 0 0 0 0 0
Enable = 1
4
-
7
MOTOROLA RF/IF DEVICE DATA
13
MC12009 MC12011 MC12013
Figure 9. Divide By 20/21 (MC12013)
COUNT 31 30 28 24 25 27 22 20 16 17 19 14 12 8 9 11 6 4 0 1 3 Q1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 Q2 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 Q3 1 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 1 1 0 0 0 Q4 1 1 1 1 1 1 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 Q4 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0
13 12
E1 Q4 E2 E3 E4 E5 C + MECL to MTTL Trans- lator
2
11 10 9 15
3 Q4 E2 + E3 + E4 + E5 = 0
E2 + E3 + E4 + E5 = 1
5
4
-
7
D
Q
Q5
C 1/2 MC10131
Q
To obtain an MTTL output, connect Pins 5 and 4 to Pins 2 and 3 respectively. Termination resistors for the MECL outputs are not shown, but are required except for the flip-flop driving the translator section. The counter may also be built using an MTTL flip-flop by connecting Pins 5 and 4 to Pins 2 and 3 respectively, and driving the MTTL flip-flop with Pin 7. MC12013 inputs E4 and E5 are used rather than E1. With E1 + E2 + E3 = 0, operation remains as shown.
B20/21
Figure 10. Divide By 40/41 (MC12013)
13 E1 12 E2 11 E3 10 E4 9 E5 15 C 5 C + MECL to MTTL Trans- lator Q Q4 3 D Q C Q Q4 2 D Q
For For
B40 : E4 + E5 = 1 B41 : E4 + E5 = 0
MC10131 7
4
-
Termination resistors for MECL outputs are not shown, but are required except for the flip-flop driving the translator section.
14
MOTOROLA RF/IF DEVICE DATA
MC12009 MC12011 MC12013
OUTLINE DIMENSIONS
P SUFFIX PLASTIC PACKAGE CASE 648-08 ISSUE R -A-
16 9
B
1 8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 1-303-675-2140 or 1-800-441-2447 Customer Focus Center: 1-800-521-6274 MfaxTM: RMFAX0@email.sps.mot.com - TOUCHTONE 1-602-244-6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, Motorola Fax Back System - US & Canada ONLY 1-800-774-1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298 - http://sps.motorola.com/mfax/ HOME PAGE: http://motorola.com/sps/ JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 141, 4-32-1 Nishi-Gotanda, Shagawa-ku, Tokyo, Japan. 03-5487-8488
MOTOROLA RF/IF DEVICE DATA
12009/D 15


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