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Multimedia ICs NTSC color TV signal encoder BA7230LS The BA7230LS comprises an RGB signal matrix circuit, balanced modulator circuit (rectangular 2-phase modulation), oscillator circuit (VCXO) for a 3.58MHz subcarrier synchronized with video input burst signals, luminosity and color difference signal mixing circuit, and a high speed switch for selecting composite signals of video input and RGB input. RGB signals, synch signals, BFP (burst flag pulses), PCP (pedestal clamp pulses) are input, and an NTSC composite signal is output. *Applications Televisions (Teletext-capable), captain systems, video cameras, personal computers *Featuressuperimposition of video images (VIDEO IN) 1) Allows and computer images (RGB IN). 2) During superimposition, the subcarrier locked onto the video input burst signal RGB is modulated with the RGB signals by the APC circuit, preventing unnatural color disturbance due to switching. 3) Both the RGB and video input signals are pedestalclamped, maintaining a natural image even during fluctuation in luminosity. 4) Using a half down pulse, the video signal can be reduced by 5dB to darken the background and make the superimposed RGB image easier to see. 5) Carrier leak is suppressible to less than 70mVP-P (VOUT = 2VP-P) without adjustment. 6) Can be adapted for analog RGB input. 7) Compact 24-pin SZIP package minimizes external components. *Block diagram BA7230LS VIDEO OUT 1 2 SYNC IN Y IN R-Y IN 3 + + 4 B-Y IN BURST LEVEL ADJUSTMENT VB 5 6 VC VA 7 MOD MOD 8 9 VCXO 10 BFP IN APC PHASE 11 ADJUSTMENT AR 13 PD 12 PD 14 AG AB 15 MATRIX B-Y OUT 17 B-Y GND 19 HD PCP IN 21 22 HDP IN 20 VIDEO IN 16 Y OUT R-Y 18 R-Y OUT YSP IN 23 VCC 24 VCC 1 Multimedia ICs BA7230LS *Input / output circuits 3 3.2V CLAMP 500 1k 2V 9.1k 10k 15k 2 1 2.2V 24 23 22 15k 7.5k 10k 15k 15k 10k CLAMP 1k 2V 500 GND 6 1V 4 5.6k VCC 21 5 20 BA7230LS 19 7 6.8k 3.4V 1k 2.7V 1.2k 4.3k 5.1k 10k VCC 1k 18 11k 9 5k 15k 6.8k 10k 10k 8 17 1k 5.1k 16 10 11 12 13 14 15 Fig. 1 *Absolute maximum ratings (Ta = 25C) Parameter Power supply voltage Power dissipation Operating temperature Storage temperature Symbol VCC Pd Topr Tstg Limits 7.0 500 - 20 ~ + 70 - 55 ~ + 125 Unit V mW C C Reduced by 5.0mW for each increase in Ta of 1C over 25C. *Recommended operating conditions Parameter Power supply voltage R input level G input level B input level Video input level Symbol VCC VR VG VB VIN Limits 4.5 ~ 5.5 0 ~ 0.7 0 ~ 0.7 0 ~ 0.7 0 ~ 1.0 Unit V VP-P VP-P VP-P VP-P 2 Multimedia ICs BA7230LS *Electrical characteristics (unless otherwise noted, Ta = 25C, VCC = 5.0V) Parameter Quiescent current Video output level Half down level change DC offset Crosstalk ER-EY output level EB-EY output level YOUT output level Ys switching delay time SYNC output level Burst output level Composite output level R-Y modulation gain B-Y modulation gain (R-Y) / (B-Y) modulation gain differential (R-Y) / (B-Y) orthogonal phase shift (R - Y) *Burst orthogonal phase shift Carrier leak APC capture range Carrier phase range Video frequency characteristic Video output DG Video output DP Input impedance (SY, BF, PC, HD) Input impedance (Ys) Threshold level (SY, BF, PC, HD) Threshold level (Ys) Symbol IQ VOV GVH VOF CT VR-Y VB-Y VY TD VOS VOB VOY GR-Y GB-Y GR-B R B LSC fCAP SC fV DG DP ZT ZTY VT VTY Min. -- 1.7 -3 -- -- 0.3 0.2 1.0 -- 0.4 0.25 1.7 9 9 -- -6 -6 -- 100 30 4.5 -- -- 8 3 0.9 0.5 Typ. 38 2.2 -5 50 - 46 0.42 0.31 1.4 60 0.65 0.46 2.2 11 11 -- -- -- 30 -- 45 6 3.5 2.5 15 7.5 2.0 1.1 Max. 54 2.6 -7 160 - 40 0.55 0.42 1.8 -- 0.9 0.8 2.6 13 13 2 6 6 70 -- -- -- -- -- -- -- 2.8 1.8 Unit mA VP-P dB mVP-P dB VP-P VP-P VP-P ns VP-P VP-P VP-P dB dB dB deg deg mVP-P Hz deg MHz % deg k k V V VOUT = 2VP-P Burst = 0.1VP-P, 2.8S Superimposition - 3dB when f = 100kHz VIDEO IN = 1VP-P VIDEO IN = 1VP-P -- -- -- -- RE = 1.8k YIN = 0.7VP-P R - YIN = 0.3VP-P B - YIN = 0.2VP-P Difference between above gains -- -- VIDEO IN = 1VP-P VIDEO IN = 1VP-P VR = 0.7VP-P VB = 0.7VP-P VR = VG = VB = 0.7VP-P -- -- VIDEO IN = 1VP-P -- Conditions -- 3 Multimedia ICs BA7230LS *Measurement circuit 0.7VP-P VCC S2 S3 SYNC S4 ICC 10F ~ S1 + 0.047F 1F + 13 + 1F + 1F 2 24 14 15 CLAMP 6dB MATRIX Y YOUT 19 ~ 1k 1k v ~ 18 R - Y 17 B - Y v 16 ER - EY EB - EY ~ v 1F +4 +5 BA7230LS R-Y B-Y 75 1F 75 MOD MOD +1F 6 S5 a 1.8k PCP 21 b + + YIN 3 23 YS 6dB - 5dB VIDEO 1VP-P 10 BG VCXO 1F 11 12 PD 2.7k 1F 7 1 470 0.047F 10k S6 + 20 BG + VCC BFP 560 HDP 68pF TC 1.2k 22 98 10k X'TAL 82pF 75 Vector scope 820 75 Oscilloscope Fig. 2 4 Multimedia ICs BA7230LS *Application example 1.2mH L2 C14 33pF LPF R17 1k 20pF C15 C1 1F R R1 G R2 560 560 B R3 560 C17 0.047F SYNC C16 + 10F VCC (5V) 24 19 GND + 13 + 14 + 15 2 1.2 mH L1 R16 1k 33pF C13 20pF C12 CLAMP 6dB MATRIX Q1 2SC2021 VCC VR2 3k VCC 2SC2021 Q2 3k VR3 300 R-Y Burst LEVEL ADJ VR4 PCP 21 6dB - 5dB VIDEO IN 1F BFP 6 5k 18 17 1F 4 C11 300 5 C10 Y YOUT 16 R4 ER - EY EB - EY 1k DL1 DLY (400ns) TRP (3.58M) + + BA7230LS 1k 1F C4 R5 Video YS R6 RGB 1F MOD MOD + 1k DL2 R7 1k DLY + + B-Y Y YIN 3 23 VCC 10k 11 VR1 12 PD R12 2.7k C61 7 470 APS PHASE ADJ + 20 BG C9 R15 10 1k HDP 0dB 22 - 5dB R14 560 68pF C8 BG 9 VCXO 8 0.047F C5 + VCC COMPOSITE TC1 OUT R13 1.2k R6 82pF C7 (2VP-P) X'TAL1 R9 C19 10pF C15 0.047F R11 75 820 R10 DL1, DL2: X503 (SUMIDA) L1, L2: RC-875 1.2mH (SUMIDA) TC1: TZ03R200E (MURATA) Q1, Q2, Q3: 2SC2021 (ROHM) XTAL1: HC - 43U 3579.545kHz (NIKKO DENSHI) Q3 2SC2021 Fig. 3 10k OUT 5 Multimedia ICs BA7230LS *Circuit operation (1) Matrix circuit The R, G and B inputs are clamped to 3.2V by the clamp circuit and combined into signals EY, ER-EY and EB-EY by the resistance-adding matrix circuit. EY = 0.30ER + 0.59EG + 0.11EB ER - EY = 0.70ER - 0.59EG - 0.11EB EB - EY = - 0.30ER - 0.59EG + 0.89EB Signal EY is then amplified by the 6dB amplifier (pin 16) to compensate for the signal's 6dB attenuation in the delay line. To prevent overmodulation, signal ER-EY is output at 1 / 1.14 and signal EB-EY at 1 / 2.03 (pins 17 and 18). BA7230LS The carrier color signal is mixed with color burst signals and luminosity signals EY' (to which a horizontal synchronization signal is added) to create the NTSC composite signal (EN). ER - EY EN = EY' + cos2fst 1.14 EB - EY + sin2fst 2.03 (3) Switch circuit Signal Ys (pin 23) switches between video input and RGB composite signals. Performing this switching at high speeds results in superimposition. RGB COMPOSITE 27k 5.1k Y 10k YS OUT 13 R G 14 B 15 VIDEO IN Fig. 4 Fig. 6 (2) Balanced modulator circuit Color difference signals are modulated (rectangular 2phase balanced modulation) with color subcarriers (3.58MHz) having a 90 phase difference. This is called the carrier color signal. C carrier color signal (combining of R-Y and B-Y) Amplitude R-Y B-Y 90 Time (4) Color subcarrier oscillator circuit The subcarrier oscillator circuit for RGB input. This circuit is synchronized with the video input color burst signal extracted by BFP (burst flag pulses) during superimposition, preventing any unnatural color disturbance due to switching between RGB and video input. This oscillator circuit generates the RGB color burst signal. An attached variable resistor can be used to change the amplitude of the color burst signal and to adjust its phase relative to the video color burst signal. This oscillator circuit remains in the free-running state when there is no video input. VCXO RGB COMPOSITE YS 9 TC1 20pF 8 R13 1.2k C7 82pF - 5dB VIDEO IN HDP (Half Down Pulse) 7 OUT 1 s 3.58 R14 560 C6 68pF R-Y 90 B-Y XT1 3.58MHz EB - EY 3.58MHz (0) ER - EY 3.58MHz (90) Balanced modulator Fig. 7 Fig. 8 + Balanced modulator Carrier color signal (5) During superimposition, video input can be lowered by about 5dB using an HDP (half-down pulse), darkening the background and making RGB input easier to see. Fig. 5 6 Multimedia ICs BA7230LS *Input waveform and timing chart VIDEO IN CB 1VP-P SYNC VH VL PCP VH VL BFP VH VL RGB IN 0.7VP-P VH HDP VL VH YS VL TTL LEVEL ( 2) TTL LEVEL ( 1) TTL LEVEL ( 1) TTL LEVEL ( 1) TTL LEVEL ( 1) COMPOSITE OUT from RGB CB 2VP-P SUPER IMPOSE CB 2VP-P 1 VL: 0 ~ 0.8V 2 VL: 0 ~ 0.4V Fig. 9 CB: COLOR BURST VH: 3.0V ~ VCC VH: 2.0V ~ VCC *Electrical characteristic curves 80 70 60 50 40 30 20 10 0 0 1 2 3 4 5 6 7 8 FREQUENCY: f (free run) (kHz) QUIESCENT CURRENT: IQ (mA) 3580.5 f0 = 3579.545kHz 600 3580.0 FREQUENCY: f (cap. lock) (Hz) 400 200 f0 = 0 - cap - 200 - 400 - 600 3578.5 3 4 5 6 7 3 4 5 6 7 - lock f0 = 3579.545kHz VIN = 0.1VP-P + lock + cap 3579.5 3579.0 POWER SUPPLY VOLTAGE: VCC (V) POWER SUPPLY VOLTAGE: VCC (V) POWER SUPPLY VOLTAGE: VCC (V) Fig. 10 Quiescent current vs. power supply voltage Fig. 11 VCXO free-run frequency vs. power supply voltage Fig. 12 Capture range and lock range (!) vs. power supply voltage 7 Multimedia ICs f0 = 3579.545kHz + lock VCC = 5V + cap BA7230LS 600 FREQUENCY: f (cap. lock) (Hz) 400 200 f0 = 0 - 200 - 400 - 600 0 100 200 300 - cap - lock 400 500 600 700 800 INPUT VOLTAGE: VIN (mVp-p) Fig. 13 Capture range and lock range (@) vs. input voltage *Operation notes inputs should be synchronized. (1) RGB and video When only RGB is input, connect VIDEO IN (pin 20) to GND with a 1F capacitor, and synchronize PCP and BFP to RGB. (3) Input pins with pedestal clamps cannot be left open and must be grounded with a low impedance. When not used, ground with a 1F capacitor. Input pins with pedestal clamps: YIN (pin 3), B-YIN (pin 4), R-YIN (pin 5), VIDEO IN (pin 20) 1F + 1F + (2) The VCXO remains in a free-running state except during superimposition. (4) Pin 4 (B-YIN) and pin 5 (R-YIN) have high impedance and are susceptible to the effects of noise and other external factors during pattern generation. For this reason, we recommend adding the circuit in Fig. 15 to lower the input impedance. Adding this circuit can also reduce carrier leakage. LPF 0.5MHz 1.2mH L2 R17 1k C14 33pF 20pF 20pF 18 VCC 17 3k VCC Q2 3k 300 (ROHM) Q1 C11 1F 300 C10 C15 1.2mH L1 R16 1k C12 Additional circuit 33pF C13 1k +4 +5 Fig. 14 1F * External dimensions (Units: mm) 21.8 0.2 2.8 0.2 Q1, Q2: 2SC2021 Fig. 15 9.9 0.5 5.8 0.2 0.889 0.5 0.1 0.3 + 0.1 - 0.05 2.54 0.25 1 23 2 24 SZIP24 8 2.0Min. |
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