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| 6-BIT D LATCH SY10E150 SY100E150 FEATURES s 700ps max. propagation delay s Extended 100E VEE range of -4.2V to -5.5V s Differential outputs s Fully compatible with industry standard 10KH, 100K ECL levels s Internal 75K input pulldown resistors s Fully compatible with Motorola MC10E/100E150 s Available in 28-pin PLCC package DESCRIPTION The SY10/100E150 are 6-bit D latches with differential outputs designed for use in new, high- performance ECL systems. When both Latch Enables (LEN1, LEN2) are at a logic LOW, the latch is in the transparent mode and input data propagates through to the output. A logic HIGH on either LEN1 or LEN2 (or both) latches the input data. The Master Reset (MR) overrides all other signals to set the Q outputs to a logic LOW. BLOCK DIAGRAM D0 Q0 Q0 PIN CONFIGURATION MR LEN2 LEN1 NC VCCO Q5 Q5 18 17 D R 25 24 23 22 21 20 19 D1 D R Q1 Q1 Q2 Q2 Q3 D5 D4 D3 VEE D2 D1 D0 26 27 28 1 2 3 4 5 6 7 8 9 10 11 Q4 Q4 VCC Q3 Q3 Q2 Q2 D2 D R PLCC TOP VIEW J28-1 16 15 14 13 12 D3 D R NC VCCO Q0 Q1 Q1 Q3 Q4 Q4 Q5 Q5 D4 D R D5 D R LEN1 LEN2 MR PIN NAMES Pin D0-D5 LEN1, LEN2 MR Q0-Q5 Q0-Q5 VCCO Function Data Inputs Latch Enables Master Reset True Outputs Inverting Outputs VCC to Output VCCO Rev.: D Q0 Amendment: /0 1 Issue Date: November, 1998 Micrel SY10E150 SY100E150 TRUTH TABLE(1) (Each Latch) INPUTS Dn H L X X X LEN1 L L X H X LEN2 L L H X X MR L L L L H Qn H L Latched(2) Latched(2) L OUTPUTS Qn L H Latched(2) Latched(2) H Asynchronous Operating Mode Latch NOTES: 1. H = HIGH state L = LOW state X = Don't care 2. Retains Data that is present before the LEN positive transition. DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0C Symbol IIH Parameter Input HIGH Current D LEN MR Power Supply Current 10E 100E -- -- 52 52 62 62 -- -- 52 52 62 62 -- -- 52 60 62 72 TA = +25C TA = +85C Max. 200 150 mA -- Unit A -- -- -- -- 200 150 -- -- -- -- 200 150 -- -- -- -- Condition -- Min. Typ. Max. Min. Typ. Max. Min. Typ. IEE 2 Micrel SY10E150 SY100E150 AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0C Symbol tPLH tPHL Parameter Propagation Delay to Output D LEN MR Set-up Time, D Hold Time, D Reset Recovery Time Minimum Pulse Width, MR Within-Device Skew Rise/Fall Time 20% to 80% TA = +25C TA = +85C Max. 550 700 750 -- -- -- -- -- 650 ps ps ps ps ps ps -- -- -- -- 1 -- Unit ps 250 375 450 200 200 750 400 -- 300 375 500 625 50 -50 650 -- 50 450 550 700 750 -- -- -- -- -- 650 250 375 450 200 200 750 400 -- 300 375 500 625 50 -50 650 -- 50 450 550 700 750 -- -- -- -- -- 650 250 375 450 200 200 750 400 -- 300 375 500 625 50 -50 650 -- 50 450 Condition -- Min. Typ. Max. Min. Typ. Max. Min. Typ. tS tH tRR tPW tskew tr tf NOTE: 1. Within-device skew is defined as identical transitions on similar paths through a device. PRODUCT ORDERING CODE Ordering Code SY10E150JC SY10E150JCTR SY100E150JC SY100E150JCTR Package Type J28-1 J28-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial Commercial 3 Micrel SY10E150 SY100E150 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 4 |
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