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| (R) MH88632 Central Office Interface Circuit Preliminary Information Features * * * * * * * * * * Loop start and ground start capabilities Transformerless 2-4 wire conversion Programmable transmit/receive gain with 0dB defaults Programmable input impedance with 600 and 900 defaults Programmable network balance with 600, 900, and AT&T compromise default One loop start & two ground start relay drivers Line state detection outputs Forward loop, reverse loop, ring ground, tip ground, ringing voltage +5V operation On-hook audio reception (to accommodate ANI) ISSUE 5 April 1995 Ordering Information MH88632 40 Pin SIL Package 0C to 70C Description The Mitel MH88632 Central Office Trunk Interface circuit provides a complete audio and signalling link between audio switching equipment and a central office. The functions provided by the MH88632 include 2-4 Wire Hybrid conversion, programmable transmit and receive gains, programmable line impedance and programmable network balance. The device is fabricated using thick film hybrid technology which incorporates various technologies for optimum circuit design and very high reliability. Applications Interface to Central Office for: * * * * * * PBX Key Telephone System Channel bank Voice Mail Terminal Equipment Digital Loop Carrier RING TIP VDD VEE AGND RV FL RL RG TG Status Detection XLA XLB XLC XLD LRC LRD BRC BRD GRC GRD Loop Termination Receive Gain 2-4 Wire Hybrid Transmit Gain RX GRX1 GRX0 TX GTX1 GTX0 Loop Relay Driver Bias Relay Driver Ring Ground Driver Impedance Matching Network Balance VRLY RGND Z1 Z2 Z600 Z900 NS N1 N2 NATT Figure 1 - Functional Block Diagram 2-235 MH88632 TIP RING XLA XLB XLC XLD IC GRD IC IC RGND VRLY LRD BRD LRC BRC GRC AGND NATT N1 Preliminary Information 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 N2 Z900 Z1 Z2 TX RX GTX0 GTX1 GRX0 GRX1 IC Z600 NS TG RL RV FL RG VEE VDD 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 Figure 2 - Pin Connections Pin Description Pin # 1 2 3 4 5 6 7 8 Name TIP RING XLA XLB XLC XLD IC GRD Description Tip Lead. Connects to the "Tip" or "Ring" lead of Central Office. Ring Lead. Connects to the "Ring" or "Tip" lead of the Central Office. Loop Relay Contact A. Connects to XLB through the loop relay (K1) contacts when the relay is activated. Activates internal active termination circuitry. Loop Relay Contact B. See XLA for description. Loop Relay Contact C. Connects to XLD through the loop relay (K1) contacts when the relay is activated. Activates internal active termination circuitry. Loop Relay Contact D. See XLC for description Internal Connection.This pin is internally connected and must be left open. Ground Relay Lead Relay Drive (Output). Connects to the Ground Ring Lead Relay Coil, used for Ground Start applications. A logic low activates the relay. An internal clamp diode from VRLY to GND is provided. Internal Connection. This pin is internally connected and must be left open. Internal Connection. This pin is internally connected and must be left open. Relay Ground. Return path for relay supply voltage. Relay Positive Supply Voltage. Normally +5V. Connects to the relay coil and the relay supply voltage Loop Relay Drive (Output). Connects to the Bias Relay coil. A logic low activates the relay. An internal clamp diode from VRLY to LRD is provided. Bias Relay Drive (Output). Connects to the Bias Relay coil, used for Ground start applications only. A logic low activates the relay. An internal clamp diode from VRLY to BRD is provided. Loop Relay Control (Input). A logic high activates the Loop Relay Drive output (LRD). The Loop Relay activates internal circuitry which provides a DC termination across Tip and Ring. Used for line seizure and dial pulsing. 9 10 11 12 13 14 IC IC RGND VRLY LRD BRD 15 LRC 2-236 Preliminary Information Pin Description (Continued) Pin # 16 Name BRC Description MH88632 Bias Relay Control (Input). A logic high activates the Loop Relay Drive output (BRD), used for Ground start applications only. This input should be connected to logic high when not used. Ground Ring Lead Relay Control (Input). A logic low activates the Ground Ring Lead Relay Drive output (GRD), used for Ground Start applications only. This input should be connected to logic high when not used. Analog Ground. 4-Wire ground. Normally connected to System Ground. Network Balance AT+T Node. Connects to N1 for a network balance impedance of AT&T compromise (350 + 1k // 210nF); the device's input impedance must be set to 600. This node is active only when NS is at logic high. This node should be left open circuit when not used. Network Balance Node 1 (Input). 0.1 times the impedance between pins N1 and N2 must match the device's input impedance, while 0.1 times the impedance between pins N1 and AGND is the device's network balance impedance. This node is active only when NS is at logic high. This node may be terminated when not used (i.e., NS at logic low). Network Balance Node 2 (Output). See N1 for description. Line Impedance 900 Node. Connects to Z1 for a line impedance of 900. This node should be left open circuit when not used. Line Impedance Node 1 (Input). 0.1 times the times the impedance between pins Z1 and Z2 is the device's line impedance. This node must always be connected. Line Impedance Node 2 (Output). 0.1 times the times the impedance between pins Z1 and Z2 is the device's line impedance. This node should be left open circuit when not used. Transmit (output). 4-Wire ground (AGND) referenced audio output. Receive (Input). 4-Wire ground (AGND) referenced audio input. Transmit Gain Node 0. Connects to GTX1 for 0dB transmit gain. Transmit Gain Node 1. Connects to a resistor to AGND for transmit gain adjustment. Receive Gain Node 0. Connects to GRX1 for 0dB gain. Receive Gain Node 1. Connects to a resistor to AGND for receive gain adjustment. Internal Connection. This pin is internally connected and must be left open. Line Impedance 600 Node (Output). Connects to Z1 for a line impedance of 600. This pin should be left open circuit when not used. Network Balance Setting (Input. The logic level at NS selects the network balance impedance. A logic 0 enables an internal balance equivalent to the input impedance (Zin). While a logic 1 enables an external balance 0.1 times the impedance between pins N1 and AGND balanced to 0.1 times the impedance between pins N1 and N2. The impedance between N1 and N2 must be equivalent to 10 times the input impedance (Zin). Tip Lead Ground Detect (Output). A logic low output indicates that the Tip lead is at ground (AGND) potential. Ring Loop Detect (Output). In the on-hook state, a logic low output indicates that reverse loop battery is present. In the off-hook state, a logic low output indicates that reverse loop current is present. Reverse loop refers to the Tip lead negative with respect to the Ring lead. Ring Voltage Detect (Output). A logic low indicates that ringing voltage is across the Tip and Ring leads. Note that this output toggles at the ringing cadence and not at the ringing frequency. 2-237 17 GRC 18 19 AGND NATT 20 N1 21 22 23 24 25 26 27 28 29 30 31 32 33 N2 Z900 Z1 Z2 TX RX GTX0 GTX1 GRX0 GRX1 IC Z600 NS 34 35 TG RL 36 RV MH88632 Pin Description (Continued) Pin # 37 Preliminary Information Name FL Description Forward Loop Detect (Output). In the on hook state, a logic low output indicates that forward loop battery is present. In the off-hook state, a logic low output indicates that forward loop current is present. Forward loop refers to the Ring Lead negative with respect to the Tip lead. Ring Lead Ground Detect (Output). A logic low indicates that the Ring lead is at ground (AGND) potential. Negative Supply Voltage. -5V dc. Positive Supply Voltage. +5V dc. 200 and 275. An external relay is used to activate internal circuitry which switches the termination in and out of the loop. This is used for both seizing the line as well as generating dial pulses. 38 RG VEE VDD 39 40 Functional Description The MH88632 is a COIC (Central Office Interface Circuit) used to interface to Central Office 2-Wire Analog Trunks. The COIC provides both Loop start and Ground start interface capabilities. Supervision Features The supervision circuitry provides the signalling status outputs. The system controlling the COIC, monitors these logic outputs. The supervision circuitry is capable of detecting ringing voltage, both forward and reverse loop battery and loop current, and both grounded tip lead and grounded ring lead. a) Supervision Features RV (Ring Voltage Detect Output) The RV (Ringing Voltage Detect) output provides a logic low when ringing voltage is detected. This detector includes a ringing filter which ensures that the output toggles at the ringing cadence and not at the ringing frequency. Typically, this output goes low 50ms after ringing voltage is applied and remains low for 50ms after ringing voltage is removed. b) Supervision Features FL & RL (Forward Loop and Reverse Loop Detect Output). The FL (Forward Loop Detect) output provides a logic low when either forward loop battery or forward loop current is detected (ring lead voltage negative with respect to ring lead). The RL (Reverse Loop Detect) output provides a logic low when either reverse loop battery or reverse loop current is detected (tip lead voltage negative with respect to ring lead). See Table 5 for Loop Battery and Current Status Outputs. Approvals FCC part 68, DOC CS-03, UL 1459, CAN/CSA 22.2 No.225-M90 are all system (i.e., connectors, power supply, cabinet, etc.) requirements. Since the MH88632 is a component and not a system, it cannot be approved as a stand alone part by these standards bodies. However, when installed into a properly designed system, the MH88632 has been designed to meet the CO Trunk Interface requirements of FCC, DOC, UL and CSA, and thus enabling the complete system to be approved by these standards bodies. To meet the regulatory high voltage requirements, an external protection circuit is required. The protection circuit shown in Figure 9 is matched to the MH88632 and ensures than they meet the high voltage requirements of FCC, DOC, CSA and UL when installed in a properly designed system. Products are designed in accordance with meeting the above requirements; however, full conformance to these standards is dependent upon the application in which the hybrid is being used, and therefore, approvals are the responsibility of the customer and Mitel will not have tested the product to meet the above standards. DC Loop Termination The DC loop termination circuitry provides the loop with an active Dc load termination when a logic low is applied to the LRC (Loop Start Relay Control) input. the termination is similar to a DC resistance between 2-238 Preliminary Information c) Supervision Features TG & RG (Tip Ground and Ring Ground Detect Output) The TG (Tip Lead Ground Detect) output provides a logic low when the tip lead is at ground (AGND) potential. The RG (Ring Lead Ground Detect) output provides a logic low when the Ring lead is at ground (AGND) potential. See Table 6 for Loop Ground Status Outputs. MH88632 The system then applies a logic high to the LRC (Loop Relay Control) input. This activates the COIC's first internal relay driver which activates relay K1. Both contacts the relay K1 close, which activates the COIC's internal circuitry resulting in an active line termination across Tip and Ring. The system then provides a logic low to the BRC input. This deactivates the COIC's second internal relay driver which deactivates K2. Both contacts of relay K2 open, which disconnect the bias from Tip and Ring. The system then provides a logic high to the GRC input. This deactivates the COIC's third internal relay driver which deactivates relay K3. The contact of relay K3 opens. which disconnects the grounded ring lead. The voice link is now established. Receiving a Ground Start call from central office is performed similarly. The central office can signal the COIC by either grounding the tip lead or by grounding the ring lead. Ground Start Signalling Features For Ground Start signalling, relay K2 and resistors R1 and R2, and relay K3 and resistor R3 are required (See Figure 8). Activation of K2 is controlled by the logic signal at the BRC (Bias Relay Control) input while activation of K3 is controlled by the logic signal at the GRC (Ground Relay Control) input. K2 is used to engage the bias resistors while K3 is used to ground the right lead; this is used in ground start applications for signalling to the central office. Hybrid The 2-4 Wire Hybrid circuit separates the balanced full duplex signal at Tip and Ring of the telephone line into receive and transmit ground referenced signals at Rx (Receive) and TX (Transmit) of the COIC. The hybrid also prevents the input signal at RX from appearing at TX. The degree to which the Hybrid minimises the contribution of the RX signal at the TX output is specified as transhybrid loss. For maximizing transhybrid loss, see the Network Balance section. The 4-Wire side can be interfaced to a filter/codec such as the Mitel MT896X, for use in digital voice switched systems. Typical Ground Start Signalling Protocol Refer to Figure 8 for Typical LS-GS Application Circuit. In the idle state, the system (e.g., PBX control card) provides a logic high to the BRC input. This activates the COIC's second internal relay driver which activates relay K2. Both contacts of relay K2 close, which connect the -48VDC supply to Tip (tip lead) and Ring (ring lead) through bias resistors R1 and R2. Depending on which Ground Start protocol is used, initiating a Ground start call to the central office can be performed by the following sequence of events. The system provides a logic low to the this activates the COIC's third internal which activates relay K3. The contacts close, which connects the ring lead through a current limiting resistor R3. GRC input. relay driver of relay K3 to ground Line Impedance The MH88632's Tip-Ring impedance (Zin) can be set to 600, 900 or to a user selectable value. Thus, Zin can be set to any international requirements. The connection to Z1 determines the input impedance. With Z1 connected to Z600, the line impedance is set to 600. With Z1 connected to Z900, the line impedance is set to 900. A user defined impedance can be selected which is 0.1 times the impedance between Z1 and Z2. For example, with 2200 in series with 11.5nF in parallel with 8200, all between Z1 and Z2, the devices line impedance will be 220 in series with 115nF in parallel with 820. See Table 3 and Figures 4 & 5. The Central Office reconizes the ring ground condition and responds by grounding the tip lead. The COIC senses the grounded Tip and switched the TG (Tip Lead Ground Detect) output to a logic low. 2-239 MH88632 Stability The part will be stable with an AC load over the range 0.5 Z in Preliminary Information TIP-RING Drive Circuit The audio input ground referenced signal at RX is converted to a balanced output signal at Tip and Ring. The Tip-Ring Drive Circuit is optimised for good 2-Wire longitudinal balance. TIP-RING Receive Circuit The differential audio signal at Tip and Ring is converted to a ground referenced audio signal at the TX output. This circuit operates with or without loop current; signal reception with no loop current is required for on-hook reception enabling the detection of ANI (Automatic Number Identification) signals. Programmable Transmit and Receive Gain Transmit gain (Tip-Ring to TX) and receive Gain (RX to Tip-Ring) are programmed by connecting external resistors (RRX and RTX) from GRX1 to AGND and from GTX1 to AGND as indicated in Figure 3 and Tables 1 and 2. The programmable gain range is from -12dB to +6dB; this wide range will accommodate any loss plan. Alternatively, the default Receive Gain of 0dB and Transmit Gain of 0dB can be obtained by connecting GRX0 to GRX1 and GTX0 to GTX1. In addition, a Receive Gain of +6dB and Transmit Gain of +6dB can be obtained by not connecting resistors RRX and RTX. For correct gain programming, the MH88632's Tip-Ring impedance (Zin) must match the line termination impedance. For optimum performance, resistor RRX should be physically located as close as possible to the GRX1 input pin. Norway: Load is 120 in series with a parallel combination of 820 and 110nF. This is synthesized on the MH88632 by 1.5k in series with a parallel combination of 12nF and 7.8k. Italy: Load is 750 in parallel with 18nF. This is synthesised on the MH88632 by 1.5k in series with a parallel combination of 2nF and 6k. Network Balance Transhybrid loss is maximized when the line termination impedance and COIC network balance are matched. The MH88632's network balance impedance can be set to Zin, AT&T (350+1k // 210nf) or to a user Selectable value. Thus, the network balance impedance can be set to any international requirement. A logic level control input NS selects the balance mode. With NS at logic low, an internal network balance impedance is matched to the line impedance (Zin). With NS at logic high, a user defined network balance impedance is selected which is 0.1 times the impedance between N1 and AGND. For example, with 2200 in series with 11.5nF in parallel with 8200, all between N1and AGND, and NS at logic high, the devices network balance impedance in 220 in series with 115nF in parallel with 820, the impedance between N1 and N2 must be equivalent to 10 times the input impedance (Zin). In addition, with NS at logic high, an AT&T network balance impedance can be selected by connecting NATT to N1; in this case, no additional network is required between N1 and N2. See Table 4 and Figures 6 & 7. ANI (Automatic Number Identification) ANI provides the called party with calling party telephone number identification. The central office utilizes the voice path of a regular loop-start telephone line when the COIC (subscriber's terminal) is in the on-hook state. The central office sends the ANI information (data transmission typically of an FSK signal of 1200Hz and 2200Hz) typically 600ms after the first ringing burst. The COIC outputs this FSK signal at the TX output. 2-240 Preliminary Information Absolute Maximum Ratings* Parameter 1 2 3 DC Supply Voltage DC Ring Relay Voltage Storage Temperature Sym VDD VEE VRLY TS Min -0.3 0.3 -0.3 -55 MH88632 Max 7 -7 20 +125 Units V V V C * Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied. Recommended Operating Conditions Parameter 1 2 3 DC Supply Voltage DC Ring Relay Voltage Operating Temperature Sym VDD VEE VVRLY TOP Typ* 5.0 -5.0 5.0 0 Min 4.75 -4.75 Max 5.25 -5.25 15 70 Units V V V C Comments * Typical figures are at 25 C with nominal + 5V supplies for design aid only. DC Electrical Characteristics Characteristics 1 2 3 FL RL RG TG RV LRD BRD GRD NS LRC BRC GRC Sym IDD IEE PC Min Typ* Max 13 13 137 0.5 Units mA mA mW V V Test Conditions Supply Current Power Consumption Low Level Output Voltage High Level Output Voltage VOL VOH IOL = 4mA IOH = 0.5mA 2.4 4 Sink Current, Relay to VDD Clamp Diode Current Low Level Input Voltage High Level Input Voltage High Level Input Current Low Level Input Current IOL ICD VIL VIH IIH IIL 100 510 0.8 2.0 1 1 mA mA V V A A VOL = -.35V 5 6 DC Electrical Characteristics are over recommended operating conditions unless otherwise stated. * Typical figures are at 25C with nominal +5V supplies and are for design aid only. Loop Electrical Characteristics Characteristics 1 2 3 4 5 6 7 8 Ringing Voltage Ringing Frequency Ringer Equivalent Number (Type A) Operating Loop Current Operating Loop Resistance Off-Hook DC Resistance Leakage Current (Tip-Ring to AGND) FL Threshold Tip-Ring Voltage Detect Tip-Ring Current Detect +30 +1.0 18 0 90 2300 10 +40 +4.2 Vdc Vdc LRC-0V LRC=0V mA mA @1000Vac @18mA, -48V REN Sym VR Min 40 17 Typ* 90 20 Max 130 33 3 Units Vrms Hz Test Conditions 2-241 MH88632 Loop Electrical Characteristics (Continued) Characteristics 9 RL Threshold Tip-Ring Voltage Detect Tip-Ring Current Detect TG and RG Detect Threshold Sym Min -30 Preliminary Information Typ* Max -40 -40 -14 Units Vdc Vdc Vdc Test Conditions LRC = 0v LRC = 0V -1.0 -12 10 DC Electrical Characteristics are over recommended operating conditions unless otherwise stated. * Typical figures are at 25C with nominal +5V supplies and are for design aid only. AC Electrical Characteristics Characteristics 1 2-wire Input Impedance x Sym Zin Min Typ* 600 900 Ext. 20 20 20 20 20 20 20 20 20 58 58 55 53 51 60 40 18 21 18 21 18 21 18 21 Max Units dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB dB k dB dB dB dB dB dB dB dB dB dB dB dB 200-500 Hz 500-1000 Hz 1000-3400 Hz 200-500 Hz 500-1000 Hz 1000-3400 Hz 200-500 Hz 500-1000 Hz 1000-3400 Hz 200 Hz 1000 Hz 2000 Hz 3000 Hz 4000 Hz 200-1000 Hz 1000 -4000 Hz 200-3400 Hz 500-2500 Hz 200-3400 Hz 500 -2500 Hz 200-3400 Hz 500-2500 Hz 200-3400 Hz 500-2500 Hz Test Conditions 2 Return Loss at 2-Wire (Zin = Ref. = 600) Return Loss at 2-Wire (Zin = Ref. = 900) Return Loss at 2-Wire y (Zin = Ref. = External) Longitudinal to Metallic Balance y z{ RL 3 RL 4 RL 5 6 7 8 9 10 11 12 13 Metallic to Longitudinal Balance Transhybrid Loss (Zin = Ref. = Net = 600) Transhybrid Loss (Zin = Ref. = Net = 900) Transhybrid Loss (Zin = Ref. = Net = External) Transhybrid Loss (Zin = Ref. = Net = 600) Input Impedance At RX Output Impedance at TX Transmit Gain, (TX/2-Wire): Default Gain (0dB) y z Programmable Range Frequency response gain y z (relative to gain at 1kHz) THL THL THL THL 14 Receive Gain, (2-Wire/RX): Default Gain (0dB) y z Programmable Range Frequency response gain y z (relative to gain at 1kHz) Input 0.5V 1kHz 1kHz 200 Hz 300 Hz 3000 Hz 3400 Hz Input 0.5V 1kHz 1kHz 200 Hz 300 Hz 3000 Hz 3400 Hz 2-242 Preliminary Information AC Electrical Characteristics (Continued) Characteristics 15 Signal Output Overload Level at 2-wire at TX Total Harmonic Distortion at 2-Wire at TX Idle Channel Noise at 2-Wire at Tx Power Supply Rejection Ratio at 2-Wire and TX VDD VEE On-Hook Transmit Gain, (TX/2-Wire) Default Gain (0dB Programmable Range On-Hook frequency Response Gain (relative to gain to 1kHz) Sym Min 4.0 4.0 THD 1.0 1.0 Nc 13 13 PSRR 20 20 30 30 dB dB dBrnC dBrnC % % Typ* Max Units dBm dBm MH88632 Test Conditions % THD< 5% Ref. 600 Ref. 600 Input 0.5V, 1kHz 16 17 18 Ripple 0.1V, 1kHz 19 Input 0.5V -1 -12 -3 -1 1 6 1 1 dB dB dB dB 1kHz 1kHz 200 Hz 3400 Hz * Typical figure are at 25C with nominal +5V supplies and are for design aid only. AC Electrical Characteristics are over recommended operating conditions unless otherwise stated. xImpedance set by external network of 600 or 900 default. yExternal network for test purposes consists of 2200 + 8200 // 11.5nF between pins Z1 and Z2, the equivalent Zin has 1/10th the impedance and is equivalent o 220+820 // 115nF zTest condition uses a Zin value of 600, 900 and the above external network. {Test conditions use a transmit and receive gain set to 0dB default and a Zin value of 600 unless otherwise stated. Notes: Test conditions use a transmit and receive gain set to 0dB default and a Zin value of 600W unless otherwise stated. Test conditions uses both the off-hook state (LRC=+5VDC) and the on-hook state (LRC=AGND) "Ref" indicates reference impedance which is equivalent to the termination impedance. "Net" indicates network balance impedance Tables 1 & 2: Transmit and Receive Gain Programming Transmit Gain (dB) +6.0 +4.0 +3.7 0.0 -3.0 -6.0 -12.0 Receive Gain (dB) +6.0 0.0 -3.0 -3.7 -4.0 -6.0 -12.0 RTX Resistor Value () No Resistor 38.3k 32.4k GTX0 to GTX1 5.49k 3.32k 1.43k RRX Resistor Value () No Resistor GRX0 to GRX1 5.49k 4.87k 4.64k 3.32k 1.43k Results in 0dB overall gain when used with Mitel A-law codec (i.e. MT8965) Results in 0dB overall gain when used with Mitel -law codec (i.e. MT8964) Results in 0dB overall gain when used with Mitel A-law codec (i.e. MT8965) Results in 0dB overall gain when used with Mitel -law codec (i.e. MT8964) Notes Notes Note 1: See Figures 3 and 4 for additional details. Note 2: Overall gain refers to the receive path of PCM to 2-wire, and transmit path of 2-wire to PCM. 2-243 MH88632 Preliminary Information MH88632 Z Z + TRANSMIT GAIN: (Tip-Ring to Tx) TX 25 10k AV= -20log (0.5+5k) RTX GTX1 GTX0 10k 28 27 RTX RTX = 10 5k (-AV/20) -0.5 Example RTX = 38k; AV = +4dB Z + Z 10k RX 26 GRX1 GRX0 10k 30 RRX RECEIVE GAIN: (RX to Tip-Ring) AV= -20log (0.5 + 5k) RRX RRX = 5k 10 (-AV/20) -0.5 Example: RRX = 4.6k; AV = -4dB 29 Figure 3 - Gain Programming with External Components 2-244 Preliminary Information MH88632 MH88632 24 Z2 NC MH88632 Z2 24 NC Z1 23 Z1 23 22 22 Z900 NC Z900 32 Z600 32 Z600 NC Input impedance (Zin) set to 600 Note: Make connection between Z1 and other points as short as possible Input Impedance (Zin) set to 900 Figure 4 - Input Impedance (Zin) Settings with Zin equal to 600 or 900 MH88632 Z2 24 10 x Zin Z1 23 RP Z2 CP Z1 22 Z900 RS+ 1 1/RP + S x CP RS Z600 32 Zin = 0.1 x where S = j x w and w = 2 x x f Example: If RS = 2200, RP = 8200, CP= 11.5nf Then the input impedance (Zin) is 220 in series with 820 in parallel with 115nF. Notes: 1) The 10xZin network must be set to 10 x the desired input impedance (Zin). 2) The network balance must be set to the desired network balance. (See section on network balance.) 3) Make connection between Z1 and component as short as possible. Figure 5 - Input Impedance (Zin) Settings with Zin not equal to 600 to 900 2-245 MH88632 Preliminary Information MH88632 21 N2 MH88632 N2 21 N1 20 N1 20 19 NATT 19 NATT NS 33 NS 33 VDD Network balance is set to the input Impedance (Zin) Network balance is set to the AT&T compromise network (350 + 1000 // 210nF) impedance. The input impedance must be set to 600. Note: Make connection between Z1 and other points as short as possible Figure 6 - Network Balance Setting with NETBAL equal to Z in or AT&T MH88632 N2 21 10 x Zin RP N2 CP N1 20 10 x NETBAL 19 NATT N1 RS 1 33 NS VDD ZNetbal = 0.1 x RS + 1/RP + (S x CP) where S = j x w and w = 2 x x f Notes: 1) The 10xZin network must be set to 10 x the desired input impedance (Zin). 2) The network balance must be set to the desired network balance. See section on network balance. 3) Make connection between Z1 and component as short as possible. Example: If RS = 2200, RP = 8200, CP= 11.5nf Then the input impedance (ZNetbal) is 220 in series with 820 in parallel with 115nF. Figure 7 - Network Balance Setting with NETBAL not equal to Zin or AT&T 2-246 Preliminary Information Table 3: Input Impedance Settings Z2 NA NA Z1 Connect Z1 to Z9000 Z600 NA NA Z900 NA Connect Z1 to Z900 NA MH88632 Resulting input impedance (Zin) 600 900 0.1 x impedance between Z1 & Z2 Connect Z1 to Z600 Connect network from Z1 to Z2 Note 1: NA indicates high impedance (10k) connection to this pin does not effect the resulting network balance. Note 2: See Figure 4 & 5 for Applications Circuits Table 4: Network Balance Settings. NS (Input) Low High High N2 NA NA Connect N1 to NATT Connect network from N1 to AGND equivalent to 10 x NETBAL. Connect network from N1 to N2 equivalent to 10 x Zin. NA 0.1 x impedance between N1 & N2 N1 NA NATT NA Resulting input impedance (Zin) Equivalent to Zin AT&T compromise (350 + 1k // 210nF) Zin must be 600 Note 1: NA indicates high impedance (10k) connection to this pin does not effect the resulting network balance. Note 2:Low indicates Logic Low. Note 3: See Figures 6 and 7 for Application Circuit. Table 5: Control Decode Table Loop Status Forward Battery Forward Current Reverse Battery Forward Current No Battery No Current Not Valid Loop Condition VT-VR > 40 V VT-VR > 3.4 V VR-VT > 40V VR-VT > 3.4 V IVT-VRI > 1.0 V IVT-VRI > 10 V No Condition LRC (Input) Low High Low High Low High High or Low FL (Output) Low Low High High High High Low RL (Output) High High Low Low High High Low Note 1: VT - VR = Differential voltage from Tip to Ring VR - VT = Differential voltage from Ring to Tip Note 2: Low indicates Logic Low. High indicates logic High. Note 3: See Figures 8 & 10 for Application Circuit. Table 6: Loop Current Setting Loop Status Ring and Tip open Ring Ground and Tip Open Tip Ground and Ring Open Ring and Tip Ground Loop Condition VT-VG > -14 V VR-VG < -14V VR-VG > -12 V VT-VG < -14V VT-VG > -12 V VR-VG < -14V VR-VG > -12 V VT-VG < -12V RG (Output) High Low High Low TG (Output) High High Low Low Note 1: VT - VR = Differential voltage from Tip to Ring VR - VT = Differential voltage from Ring to AGND Note 2: A > -B indicates that "A" is less negative than "-B". A<-B indicates that "A" is more negative than "-B". Note 3:Low indicates Logic Low. High indicates logic High. Note 4: See Figure 8 for Application Circuit. 2-247 MH88632 K2A R1 R2 K2B 48V BATTERY Preliminary Information MH88632 TIP PROTECTION CIRCUIT 2 RING RING R3 13 K1 K3 K2 K3 GRX0 RX Z1 Z600 23 32 29 1 TIP 28 GTX1 GTX0 TX GRX1 27 25 30 AUDIO OUT Loop Current Setting LRD 26 BRD GRD VRLY RGND NS LRC BRC 33 AUDIO IN 14 8 12 11 15 LOOP RELAY CONTROL 16 BIAS RELAY CONTROL 17 GROUND RELAY CONTROL K1A 3 GRC XLA RV FL 4 K1B 5 XLC 6 RG TG XLD VDD 40 RGND AGND 18 NS +5V -5V VEE 39 XLB RL 36 37 35 38 34 RING DETECT FORWARD LOOP REVERSE LOOP RING GROUND RING DETECT NOTES: 1) SEE FIGURE 9 FOR PROTECTION CIRCUIT 2) CONFIGURED FOR 0dB GAIN, 600 ZIN AND BALANCE 3) K1, 2 E/M FORM C 4) K3 E/M 1 FORM C 5) R1, R2 30.9k, 1%, 5W 6) R3 470, 5%, 5W 7) K2, 3, R1, 2, 3 REQUIRED FOR GS ONLY Figure 8 - Typical LS-GS Application Circuit 2-248 Preliminary Information MH88632 PROTECTION CIRCUITRY F1 TIP R1 RV1 RV3 2 RING MH88632 1 TIP RV2 F2 RING R2 AGND 18 Notes: 1) F1, 2 1AMP, 250VAC, SLOW-BLOW LITTLEFUSE 230 2AG 2) R1, 2, 2.4 5% 1/2W 350V, FLAME RATED RESISTOR i.e, ALLEN BRADLEY EB24G5, DALE/VISHAY LCA 0411NE 2.4 5% 3) RV1, 2, 3, 250VAC, 35J, METAL OXIDE VARISTOR i.e., HARRIS, V250LA10, OHIZUMI 0250NC12D Figure 9 - External Protection Applications Circuit 2-249 MH88632 Preliminary Information MH88632 TIP PROTECTION CIRCUIT 2 RING RING 1 TIP 28 GTX1 GTX0 TX GRX1 GRX0 LRD RX Z1 12 11 15 LOOP RELAY CONTROL 16 BRC 17 GRC 3 K1 XLA RV FL 4 XLB RL 5 K1 6 XLD VDD 40 AGND 18 VEE 39 XLC 36 37 35 RING DETECT FORWARD LOOP REVERSE LOOP LRC VRLY RGND NS 33 Z600 23 32 27 25 30 29 26 AUDIO IN AUDIO OUT K1 13 +5V NOTES: 1) SEE FIGURE 9 FOR PROTECTION CIRCUIT 2) CONFIGURED FOR 0dB GAIN, 600 ZIN AND BALANCE 3) K1, E/M 2 FORM C -5V Figure 10 - Typical LS Application Circuit 2-250 Preliminary Information MH88632 Side View 0.080 Max (2.0 Max) 4.20 + 0.020 (107 + 1.0) 0.58+0.02 (14.7+0.5) 123 4 39 40 0.010 + 0.002 (0.25 + 0.05) 0.12 Max (3.1 Max) Notes: 1) Not to scale 2) Dimensions in inches). 3) (Dimensions in millimetres). *Dimensions to centre of pin & tolerance non accumulative. 0.05 + 0.01 (1.3 + 0.5) * 0.25 + 0.02 (1.3 + 0.05) 0.020 + 0.05 (0.51 + 0.13) * * 0.100 + 0.10 (2.54 + 0.13) 0.18 + 0.02 (4.6 + 0.5) Figure 11 - Mechanical Data 2-251 MH88632 Notes: Preliminary Information 2-252 |
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