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| A/D, D/C Converters for Image Signal Processing MN657021F Low Power 8-Bit, 3-Channel CMOS D/A Converter for Image Processing Overview The MN657021F is a high-speed 8-bit, 3-channel CMOS digital-to-analog converter. (Two channels use serial input.) It uses both a matrix cell and weighted current technology to achieve both low power consumption and high speed. It provides independent output amplitude adjustment for the Y (luminance) and C (chroma) synchronization signals. The Y (luminance signal) can be superimposed with an external SYNC signal. Pin Assignment Features Maximum conversion rate: 27 MSPS (min.) Linearity error: 0.2 LSB (typ.) Differential linearity error: 0.2 LSB (typ.) Power supply voltage: 3.15 0.3 V Full scale current: 1.75 mA (typ.) Power consumption: 54 mW (typ.) (fCLK=27 MHz) Applications Digital television Digital video equipment Digital image processing equipment DY4 DY3 DY2 DY1 SYNC DVDD DVSS MSEL N.C. AVDD COMPS IREFS 1 2 3 4 5 6 7 8 9 10 11 12 N.C. DC3 DC2 DC1 UVSEL DVDD DVSS CLK DY8 DY7 DY6 DY5 37 38 39 40 41 42 43 44 45 46 47 48 36 35 34 33 32 31 30 29 28 27 26 25 DC4 DC5 DC6 DC7 DC8 DVSS DVDD N.C. AVSS VREFC IREFC COMPC 24 23 22 21 20 19 18 17 16 15 14 13 N.C. IOV AVDD IOU AVSS AVDD IOY AVSS VREFY IREFY COMPY VREFY (TOP VIEW) TQFP048-P-0707 1 MN657021F Block Diagram A/D, D/C Converters for Image Signal Processing COMPY COMPS 13 V REFS 12 11 15 IREFY IREFS 16 VREFY 14 + - CLK 44 Current Source + - Current Source Selector Current cell Current cell Latch Latch Latch SYNC 5 (MSB) DY1 4 3 DY2 2 DY3 DY4 1 DY5 48 DY6 47 DY7 (LSB) DY8 46 45 Decoder Latch Latch Latch 37 29 24 9 N.C. 18 IOY (MSB) DC1 40 39 DC2 DC3 38 DC4 36 DC5 35 DC6 34 DC7 (LSB) DC8 33 32 Current cell Decoder Latch Latch Latch 21 IOU Selector Selector Current cell Decoder 23 UVSEL 41 Latch MSEL 8 Selector + - 30 42 31 43 27 26 25 10 19 6 7 Latch IOV Current Source 22 17 20 AVSS 28 AVSS COMPC DVSS DVSS DVSS IREFC DVDD DVDD DVDD VREFC AVDD AVDD 2 AVDD AVSS A/D, D/C Converters for Image Signal Processing Pin Descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 Symbol DY4 DY3 DY2 DY1 SYNC DVDD DVSS MSEL N.C. AVDD COMPS IREFS VREFS COMPY IREFY VREFY AVSS IOY AVDD AVSS IOU AVDD IOV N.C. COMPC IREFC VREFC AVSS N.C. DVDD DVSS DC8 DC7 DC6 DC5 DC4 N.C. DC3 DC2 DC1 UVSEL DVDD Function Description Y (luminance) digital input Y (luminance) digital input Y (luminance) digital input Y (luminance) digital input (MSB) SYNC signal judgment signal Power supply for digital circuits Ground for digital circuits Y, C/Y, R-Y, B-Y discrimination signal No connection Power supply for analog circuits Phase compensation Full scale adjustment resistor SYNC reference voltage input Phase compensation Full scale adjustment resistor Luminance reference voltage input Ground for analog circuits Y signal analog current output Power supply for analog circuits Ground for analog circuits U signal analog current output Ground for analog circuits V signal analog current output No connection Phase compensation Full scale adjustment resistor Chroma reference voltage input Ground for analog circuits No connection Power supply for digital circuits Ground for digital circuits C (chroma) digital input (LSB) C (chroma) digital input C (chroma) digital input C (chroma) digital input C (chroma) digital input No connection C (chroma) digital input C (chroma) digital input C (chroma) digital input (MSB) U/V signal discrimination for C (chroma) signal Power supply for digital circuits MN657021F 3 MN657021F Pin Descriptions (continued) Pin No. 43 44 45 46 47 48 Symbol DVSS CLK DY8 DY7 DY6 DY5 A/D, D/C Converters for Image Signal Processing Function Description Ground for digital circuits Sampling clock Y (luminance) digital input (LSB) Y (luminance) digital input Y (luminance) digital input Y (luminance) digital input Ta=25C Absolute Maximum Ratings Parameter Power supply voltage for digital circuits Power supply voltage for analog circuits Input voltage Output voltage Operating ambient temperature Storage temperature Parameter Power supply voltage Reference voltage Reference resistance External compensation capacitor Output load resistance Digital input voltage Clock "H" level "L" level "H" level pulse width "L" level pulse width Symbol DVDD AVDD VI VO Topr Tstg Symbol VDD VREFS/Y, C RREFS/Y, C CCOMPS, Y, C ROUT VIH VIL tWH tWL min 2.85 1.0 2.0/0.58 0.33 75 VDD x 0.75 VSS 16 16 Rating - 0.3 to +7.0 - 0.3 to +7.0 - 0.3 to DVDD +0.3 - 0.3 to AVDD +0.3 -20 to +70 -55 to +125 typ 3.0 1.85/1.63 5.0/2.5 1.0 400 max 3.45 2.3 8.0/5.0 3.3 500 VDD VDD x 0.25 Unit V V V V C C Unit V V k F V V ns ns Recommended Operating Conditions VDD=AVDD=DVDD=3.0V, VSS=AVSS=DVSS=0V, Ta=25C Electrical Characteristics Parameter Power supply current DVDD=AVDD=3.0V, DVSS=AVSS=0V, Ta=25C Symbol Conditions IDD FCLK=30MHz, MSEL="H", Output amplitude=0.7 V, ROUT=400 min typ 18 8 max 28 Unit mA bit Resolution Linearity error Differential linearity error Full scale current Setup time Hold time Settling time Maximum conversion speed Analog output delay time RES EL ED IFS tS tH tST FC(max.) td VDD=3.0V, Y output amplitude=0.7V, VDD=3.0V, Y output amplitude=0.7V 0.2 0.2 1.75 12 10 25 27 10 0.5 0.5 LSB LSB mA ns ns UV output amplitude=0.7V ROUT=400 RREFY=2.5k, RREFC=2.5k 37 ns MSPS ns UV output amplitude=0.7V ROUT=400, RREF=2.5k VDD=3.0V, Y output amplitude=0.7V, UV output amplitude=0.7V 4 A/D, D/C Converters for Image Signal Processing Timing Chart M SELECT = "L," Y and U(C), 2-channel output MN657021F SYNC CLK DY1 to DY8 Y-1 Y0 Y1 Y2 Y3 Y4 Y5 DC1 to DC8 C-1 C0 C1 C2 C3 C4 C5 IOY Y-3 Y-2 Y-1 Y-0 Y1 tds Y3 tds C2 C3 IOU C-3 C-2 C-1 C-0 C1 Two clock cycles td tst tds: SYNC delay time td: Analog output delay time tst: Settling time 5 MN657021F A/D, D/C Converters for Image Signal Processing M SELECT = "H," Y and U(C), 3-channel output SYNC CLK DY1 to DY8 Y-1 Y0 Y1 Y2 Y3 Y4 Y5 DC1 to DC8 Y-2 U0 V0 U2 V2 U4 V4 UVSEL Two clock cycles IOY Y-2 Y-1 Y0 Y1 Y3 tds IOU U-4 U-2 U0 U2 tds IOV V-4 V-2 Two clock cycles td tst V0 V2 tds: SYNC delay time td: Analog output delay time tst: Settling time 6 A/D, D/C Converters for Image Signal Processing Package Dimensions (Unit:mm) TQFP048-P-0707 MN657021F 9.00.2 7.00.2 36 25 (0.75) 7.00.2 37 24 48 13 1 (0.75) 0.5 12 0.20.1 (1.0) 2.9 max. 2.50.2 +0.10 -0.05 9.00.2 0.15 0.10.1 0.1 SEATING PLANE 0.50.2 0 to 10 7 |
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