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FEATURES +1.8 V to +5.5 V Single Supply Low On Resistance (2.5 Typ) Low On-Resistance Flatness -3 dB Bandwidth > 200 MHz Rail-to-Rail Operation 16-Lead TSSOP and SOIC Packages Fast Switching Times tON 16 ns tOFF 10 ns Typical Power Consumption (< 0.01 TTL/CMOS Compatible APPLICATIONS Battery Powered Systems Communication Systems Sample Hold Systems Audio Signal Routing Video Switching Mechanical Reed Relay Replacement GENERAL DESCRIPTION
CMOS Low Voltage 4 Quad SPST Switches ADG711/ADG712/ADG713
FUNCTIONAL BLOCK DIAGRAMS
S1 IN1 D1 S2 IN2 IN2 D2 S3 IN3 IN3 D3 S4 IN4 D4 IN4 D4 D3 S4 IN4 D4 IN1 D1 S2 IN2 D2 S3 IN3 D3 S4 S1 IN1 D1 S2 D2 S3 S1
ADG711
ADG712
ADG713
W)
SWITCHES SHOWN FOR A LOGIC "1" INPUT
PRODUCT HIGHLIGHTS
The ADG711, ADG712 and ADG713 are monolithic CMOS devices containing four independently selectable switches. These switches are designed on an advanced submicron process that provides low power dissipation yet gives high switching speed, low on resistance, low leakage currents and high bandwidth. They are designed to operate from a single +1.8 V to +5.5 V supply, making them ideal for use in battery powered instruments and with the new generation of DACs and ADCs from Analog Devices. Fast switching times and high bandwidth make the part suitable for video signal switching. The ADG711, ADG712 and ADG713 contain four independent single-pole/single throw (SPST) switches. The ADG711 and ADG712 differ only in that the digital control logic is inverted. The ADG711 switches are turned on with a logic low on the appropriate control input, while a logic high is required to turn on the switches of the ADG712. The ADG713 contains two switches whose digital control logic is similar to the ADG711, while the logic is inverted on the other two switches. Each switch conducts equally well in both directions when ON. The ADG713 exhibits break-before-make switching action. The ADG711/ADG712/ADG713 are available in 16-lead TSSOP and 16-lead SOIC packages.
1. +1.8 V to +5.5 V Single Supply Operation. The ADG711, ADG712 and ADG713 offer high performance and are fully specified and guaranteed with +3 V and +5 V supply rails. 2. Very Low RON (4.5 max at +5 V, 8 max at +3 V). At supply voltage of +1.8 V, RON is typically 35 over the temperature range. 3. Low On-Resistance Flatness. 4. -3 dB Bandwidth >200 MHz. 5. Low Power Dissipation. CMOS construction ensures low power dissipation. 6. Fast tON/tOFF. 7. Break-Before-Make Switching. This prevents channel shorting when the switches are configured as a multiplexer (ADG713 only). 8. 16-Lead TSSOP and 16-Lead SOIC Packages.
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1998
ADG711/ADG712/ADG713-SPECIFICATIONS1 -40 C to +85 C unless otherwise noted.)
(VDD = +5 V
Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON) On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay, tD (ADG713 Only) Charge Injection Off Isolation B Version -40 C to +25 C +85 C 0 V to VDD 2.5 4 4.5 0.05 0.3 1.0 0.01 0.1 0.01 0.1 0.01 0.1 Units V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max VIN = VINL or VINH Test Conditions/Comments
10%, GND = 0 V. All specifications
VS = 0 V to VDD, IS = -10 mA; Test Circuit 1 VS = 0 V to VDD, IS = -10 mA VS = 0 V to VDD, IS = -10 mA VDD = +5.5 V; VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test Circuit 2 VS = 4.5 V/1 V, VD = 1 V/4.5 V; Test Circuit 2 VS = VD = 1 V, or 4.5 V; Test Circuit 3
0.5
0.2 0.2 0.2 2.4 0.8
0.005
0.1
11 16 6 10 6 1 3 -58 -78 -90 200 10 10 22 0.001 1.0
Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD
RL = 300 , CL = 35 pF, VS = 3 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS = 3 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS1 = VS2 = 3 V; Test Circuit 5 VS = 2 V; RS = 0 , CL = 1 nF; Test Circuit 6 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 , CL = 5 pF, f = 10 MHz; Test Circuit 8 RL = 50 , CL = 5 pF; Test Circuit 9
VDD = +5.5 V Digital Inputs = 0 V or 5 V
NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
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SPECIFICATIONS
Parameter ANALOG SWITCH Analog Signal Range On-Resistance (RON)
1
ADG711/ADG712/ADG713
(VDD = +3 V 10%, GND = 0 V. All specifications -40 C to +85 C unless otherwise noted.)
B Version -40 C to +25 C +85 C 0 V to VDD 5.5 8 0.3 2.5 0.01 0.1 0.01 0.1 0.01 0.1
Units V typ max typ max typ nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ dB typ MHz typ pF typ pF typ pF typ A typ A max
Test Conditions/Comments
5 0.1
On-Resistance Match Between Channels (RON) On-Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay, tD (ADG713 Only) Charge Injection Off Isolation
VS = 0 V to VDD, IS = -10 mA; Test Circuit 1 VS = 0 V to VDD, IS = -10 mA VS = 0 V to VDD, IS = -10 mA VDD = +3.3 V; VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = 3 V/1 V, VD = 1 V/3 V; Test Circuit 2 VS = VD = 1 V, or 3 V; Test Circuit 3
0.2 0.2 0.2 2.0 0.4
0.005
0.1
VIN = VINL or VINH
13 20 7 12 7 1 3 -58 -78 -90 200 10 10 22 0.001 1.0
Channel-to-Channel Crosstalk Bandwidth -3 dB CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD
RL = 300 , CL = 35 pF, VS = 2 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS = 2 V; Test Circuit 4 RL = 300 , CL = 35 pF, VS1 = VS2 = 2 V; Test Circuit 5 VS = 1.5 V; RS = 0 , CL = 1 nF; Test Circuit 6 RL = 50 , CL = 5 pF, f = 10 MHz RL = 50 , CL = 5 pF, f = 1 MHz; Test Circuit 7 RL = 50 , CL = 5 pF, f = 10 MHz; Test Circuit 8 RL = 50 , CL = 5 pF; Test Circuit 9
VDD = +3.3 V Digital Inputs = 0 V or 3 V
NOTES 1 Temperature ranges are as follows: B Version: -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
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ADG711/ADG712/ADG713
ABSOLUTE MAXIMUM RATINGS 1
(TA = +25C unless otherwise noted)
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 V to +6 V Analog, Digital Inputs2 . . . . . . . . . . . -0.3 V to VDD +0.3 V or 30 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . 30 mA Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150C TSSOP Package, Power Dissipation . . . . . . . . . . . . . 430 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 150C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . 27C/W
SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 520 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . 125C/W JC Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 42C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG711/ADG712/ADG713 feature proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
ORDERING GUIDE
Model ADG711BR ADG712BR ADG713BR ADG711BRU ADG712BRU ADG713BRU
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 0.15" Small Outline (SOIC) 0.15" Small Outline (SOIC) 0.15" Small Outline (SOIC) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP) Thin Shrink Small Outline (TSSOP)
Package Option R-16A R-16A R-16A RU-16 RU-16 RU-16
Table I. Truth Table (ADG711/ADG712)
ADG711 In 0 1
ADG712 In 1 0
Switch Condition ON OFF
PIN CONFIGURATION (TSSOP/SOIC)
IN1 1 D1 2 S1 3
16 15
IN2 D2 S2 VDD NC
Table II. Truth Table (ADG713)
NC 4 GND 5
ADG711 ADG712 ADG713
14 13 12
Logic 0 1
Switch 1, 4 OFF ON
Switch 2, 3 ON OFF
TOP VIEW S4 6 (Not to Scale) 11 S3 D4 7 IN4 8
10 9
D3 IN3
NC = NO CONNECT
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ADG711/ADG712/ADG713
TERMINOLOGY
VDD GND S D IN RON RON RFLAT(ON)
Most positive power supply potential. Ground (0 V) reference. Source terminal. May be an input or output. Drain terminal. May be an input or output. Logic control input. Ohmic resistance between D and S. On resistance match between any two channels i.e., RONmax-RONmin. Flatness is defined as the difference between the maximum and minimum value of onresistance as measured over the specified analog signal range. Source leakage current with the switch "OFF." Drain leakage current with the switch "OFF." Channel leakage current with the switch "ON." Analog voltage on terminals D, S. "OFF" switch source capacitance. "OFF" switch drain capacitance. "ON" switch capacitance. Delay between applying the digital control input and the output switching on.
tOFF tD
Crosstalk
Off Isolation Charge Injection Bandwidth On Response On Loss
IS (OFF) ID (OFF) ID, IS (ON) VD (VS) CS (OFF) CD (OFF) CD, CS (ON) tON
Delay between applying the digital control input and the output switching off. "OFF" time or "ON" time measured between the 90% points of both switches, when switching from one address state to another. (ADG713 only). A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. A measure of unwanted signal coupling through an "OFF" switch. A measure of the glitch impulse transferred from the digital input to the analog output during switching. The frequency at which the output is attenuated by 3 dB. The frequency response of the "ON" switch. The voltage drop across the "ON" switch, seen on the On Response vs. Frequency plot as how many dBs the signal is away from 0 dB at very low frequencies.
Typical Performance Characteristics
6 5.5 5 4.5 4 3.5 VDD = +4.5V VDD = +2.7V TA = +25 C 6 5.5 5 4.5 4 3.5
RON -
VDD = +3V +85 C +25 C
RON -
3 2.5 2 1.5 1 0.5 0 0
VDD = +3V
3 2.5 -40 C 2 1.5 1 0.5 0
VDD = +5V
0.5 1 1.5 2 2.5 3 3.5 4 4.5 VD OR VS - DRAIN OR SOURCE VOLTAGE - Volts
5
0
0.5 1.5 2 2.5 1 VD OR VS - DRAIN OR SOURCE VOLTAGE - Volts
3
Figure 1. On Resistance as a Function of VD (VS)
Figure 2. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 3 V
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ADG711/ADG712/ADG713 -Typical Performance Characteristics
6 5.5 5 4.5 4 3.5
RON -
-30
VDD = +5V
-40 VDD = +5V, +3V -50
CROSSTALK - dB
-60 -70 -80 -90 -100
+85 C +25 C
3 2.5 2 1.5 1 0.5 0 0
-40 C
-110 -120 -130 10k 100k 1M 10M FREQUENCY - Hz 100M
0.5 1 1.5 2 2.5 3 3.5 4 4.5 VD OR VS - DRAIN OR SOURCE VOLTAGE - Volts
5
Figure 3. On Resistance as a Function of VD (VS) for Different Temperatures VDD = 5 V
Figure 6. Crosstalk vs. Frequency
10m VDD = +5V 1m 100
0
VDD = +5V ON RESPONSE - dB
1M 10M
ISUPPLY - Amps
-2
4 SW 10 1 SW 1
-4
100n
10n 1n 100
1k
10k 100k FREQUENCY - Hz
-6 10k
100k
1M 10M FREQUENCY - Hz
100M
Figure 4. Supply Current vs. Input Switching Frequency
Figure 7. On Response vs. Frequency
-30 -40 VDD = +5V, +3V -50 OFF ISOLATION - dB -60 QINJ - pC -70 -80 -90 -100 -110
25 TA = +25 C 20 15 10 5 VDD = +5V
VDD = +3V
0 -5
-120 -130 10k
-10
100k
1M 10M FREQUENCY - Hz
100M
0
0.5
1
1.5 2 2.5 3 3.5 SOURCE VOLTAGE - Volts
4
4.5
5
Figure 5. Off Isolation vs. Frequency
Figure 8. Charge Injection vs. Source Voltage
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ADG711/ADG712/ADG713
APPLICATIONS
Figure 9 illustrates a photodetector circuit with programmable gain. An AD820 is used as the output operational amplifier. With the resistor values shown in the circuit, and using different combinations of the switches, gain in the range of 2 to 16 can be achieved.
C1 R1 33k +5V
AD820
D1 +2.5V R2 510k +5V R4 240k R6 120k R8 120k R9 120k +2.5V R10 120k GAIN RANGE 2 TO 16 R5 240k R7 120k R3 510k VOUT
S1 (LSB) IN1 S2 IN2 S3 IN3 S4 (MSB) IN4 GND
D1
D2
D3
D4
Figure 9. Photodetector Circuit with Programmable Gain
Test Circuits
IDS V1 IS (OFF) S VS RON = V1/IDS D VS A S D ID (OFF) A VD
S VS
D
ID (ON) A VD
Test Circuit 1. On Resistance
VDD 0.1 F
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
VIN ADG711 VDD
50%
50%
S VS IN GND
D RL 300 CL 35pF
VIN ADG712 VOUT
50% VS
50% 90%
VOUT
90%
t ON
t OFF
Test Circuit 4. Switching Times
VDD 0.1 F VIN 0V 50% 50%
VDD VS1 VS2 IN1, IN2 S1 S2 D1 D2 RL2 300 CL2 35pF VOUT2 RL1 300 CL1 35pF VOUT1 VOUT1 0V
90%
90%
VIN
ADG713
GND
VOUT2 0V
90%
90%
tD
tD
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Test Circuit 5. Break-Before-Make Time Delay, tD -7-
ADG711/ADG712/ADG713
VDD VDD RS VS IN GND S D CL 1nF VOUT VOUT Q INJ = CL VOUT VOUT VIN SW ON SW OFF
Test Circuit 6. Charge Injection
VDD 0.1 F 0.1 F VDD S D RL 50 GND VIN IN GND VOUT S VDD D RL 50 VOUT VDD
VS
VIN
IN
VS
Test Circuit 7. Off Isolation
VDD 0.1 F
Test Circuit 9. Bandwidth
VDD S D 50
VS
VIN1 VIN2 S GND D RL 50 VOUT
NC
CHANNEL-TO-CHANNEL CROSSTALK = 20
LOG |VS /VOUT |
Test Circuit 8. Channel-to-Channel Crosstalk
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead Narrow Body SOIC (R-16A)
0.3937 (10.00) 0.3859 (9.80)
16 1 9 8
16-Lead TSSOP (RU-16)
0.201 (5.10) 0.193 (4.90)
0.1574 (4.00) 0.1497 (3.80)
0.2440 (6.20) 0.2284 (5.80)
0.177 (4.50) 0.169 (4.30)
16
9
0.256 (6.50) 0.246 (6.25)
1 8
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) 0.0099 (0.25)
45
SEATING PLANE
0.0500 (1.27) BSC
8 0.0192 (0.49) 0 0.0099 (0.25) 0.0138 (0.35) 0.0075 (0.19)
0.0500 (1.27) 0.0160 (0.41)
0.006 (0.15) 0.002 (0.05)
PIN 1
0.0433 (1.10) MAX 0.0118 (0.30) 0.0075 (0.19) 0.0079 (0.20) 0.0035 (0.090)
SEATING PLANE
0.0256 (0.65) BSC
8 0
0.028 (0.70) 0.020 (0.50)
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PRINTED IN U.S.A.
C3385-8-10/98

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