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 PROFET(R) BTS 707
Smart Two Channel Highside Power Switch
Features
* Overload protection * Current limitation * Short-circuit protection * Thermal shutdown * Overvoltage protection * Fast demagnetization of inductive loads * Reverse battery protection1) * Open drain diagnostic output * Open load detection in OFF-state * CMOS compatible input * Loss of ground and loss of Vbb protection * Electrostatic discharge (ESD) protection
Product Summary Overvoltage Protection Operating voltage active channels: On-state resistance RON Nominal load current IL(NOM)
Vbb(AZ) Vbb(on) one 250 1.9
65 V 5.8 ... 58 V two parallel 125 m 2.8 A
Application
* C compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads * Most suitable for inductive loads * Replaces electromechanical relays, fuses and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS(R) technology. Fully protected by embedded protection functions. Pin Definitions and Functions Pin 1,10, 11,12, 15,16, 19,20 3 7 17,18 13,14 4 8 2 6 5,9 Symbol Function Positive power supply voltage. Design the Vbb wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance IN1 Input 1,2, activates channel 1,2 in case of IN2 logic high signal OUT1 Output 1,2, protected high-side power output OUT2 of channel 1,2. Design the wiring for the max. short circuit current ST1 Diagnostic feedback 1,2 of channel 1,2, ST2 open drain, low in on state on failure or high in off state on failure GND1 Ground 1 of chip 1 (channel 1) GND2 Ground 2 of chip 2 (channel 2) N.C. Not Connected Pin configuration (top view) Vbb GND1 IN1 ST1 N.C. GND2 IN2 ST2 N.C. Vbb 1 2 3 4 5 6 7 8 9 10
*
20 19 18 17 16 15 14 13 12 11
Vbb Vbb OUT1 OUT1 Vbb Vbb OUT2 OUT2 Vbb Vbb
1)
With external current limit (e.g. resistor RGND=150 ) in GND connection, resistor in series with ST connection, reverse load current limited by connected load.
Semiconductor Group
1
08.96
BTS 707 Block diagram
+ Vbb
Leadframe
Voltage source
Overvoltage protection
Current limit
Gate
protection
VLogic
Voltage sensor
Charge pump
Level shifter Rectifier
Limit for unclamped ind. loads Open load
OUT1 17,18 Temperature
3 4 1
SignalGND Chip 1
sensor Load
IN1
ST1
ESD
Logic
detection
Short circuit
GND1
Chip 1
detection
Load GND + Vbb
Leadframe
OUT2 13,14
Logic and protection circuit of chip 2 (equivalent to chip 1)
7 8 6
SignalGND Chip 2
IN2
Load
ST2
GND2
Chip 2
PROFET
(R)
Load GND
Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20
Maximum Ratings at Tj = 25C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection Tj,start = -40 ...+150C Load current (Short-circuit current, see page 5) Operating temperature range Storage temperature range Symbol Values 65 40 self-limited -40 ...+150 -55 ...+150 Unit V V A C
Vbb Vbb IL Tj Tstg
Semiconductor Group
2
BTS 707
Maximum Ratings at Tj = 25C unless otherwise specified Parameter Power dissipation (DC)2) Ta = 25C: Ta = 85C: (all channels active) Electrostatic discharge capability (ESD) IN, ST: (Human Body Model) all other pins: Input voltage (DC) Current through input pin (DC) Current through status pin (DC)
see internal circuit diagram page 7
Symbol
Values 3 1.6 1.0 tbd (>1.0) -0.5 ... +36 2.0 5.0
Unit W kV V mA
Ptot VESD VIN IIN IST
Thermal Characteristics
Parameter and Conditions Symbol min Thermal resistance junction - soldering point2),3) each channel: Rthjs 2) junction - ambient one channel active: Rthja all channels active: ---Values typ max -45 37 18 --Unit
K/W
Electrical Characteristics
Parameter and Conditions, each of the two channels
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT) IL = 2 A each channel, Tj = 25C: RON Vbb = 24 V Tj = 150C: two parallel channels, Tj = 25C: Nominal load current one channel active: IL(NOM) two parallel channels active: Device on PCB2), Ta = 85C, Tj 150C Output current while GND disconnected or pulled IL(GNDhigh) up; Vbb = 32 V, VIN = 0, see diagram page 8
--
225 400 113 1.9 2.8 --
250 500 125 --
m
1.60 2.4 --
A
1.1
mA
2) 3)
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb connection. PCB is vertical without blown air. See page 12 Soldering point: upper side of solder edge of device pin 15. See page 12
Semiconductor Group
3
BTS 707
Parameter and Conditions, each of the two channels
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max 15 20 ----80 70 6
Unit
Turn-on time to 90% VOUT: Turn-off time to 10% VOUT: RL = 12 , Vbb = 20 V, Tj =-40...+150C Slew rate on 10 to 30% VOUT, RL = 12 , Vbb = 20 V, Tj =-40...+150C: Slew rate off 70 to 40% VOUT, RL = 12 , Vbb = 20 V, Tj =-40...+150C: Operating Parameters Operating voltage4) Tj =-40...+150C: Undervoltage shutdown Tj =-40...+150C: Undervoltage restart Tj =-40...+150C: Undervoltage restart of charge pump see diagram page 11 Tj =-40...+150C: Undervoltage hysteresis Vbb(under) = Vbb(u rst) - Vbb(under) Overvoltage protection5) Tj =-40...+150C: I bb = 40 mA Standby current, all channels off VIN = 0 Tj =150C: Operating current 6), VIN = 5V, Tj =-40...+150C IGND = IGND1 + IGND2, one channel on: two channels on: Protection Functions Initial peak short circuit current limit, (see timing
diagrams, page 9)
ton toff
dV/dton
s
V/s
-dV/dtoff
--
--
7
V/s
Vbb(on) Vbb(under) Vbb(u rst) Vbb(ucp)
Vbb(under)
5.8 2.7 ---65 -----
---5.6 0.4 70 20
58 4.7 4.9 7.5 --70
V V V V V V A
Vbb(AZ) Ibb(off)
IGND
2.2 4.4
---
mA
each channel, Tj =-40C: Tj =25C: Tj =+150C: two parallel channels Output clamp (inductive load switch off)7) at VON(CL) = Vbb - VOUT Thermal overload trip temperature Thermal hysteresis
4) 5) 6) 7)
IL(SCp)
--19 -10 -4.0 --twice the current of one channel VON(CL) 59 -75
A
V C K
Tjt Tjt
150 --
-10
---
At supply voltage increase up to Vbb = 5.6 V typ without charge pump, VOUT Vbb - 2 V see also VON(CL) in circuit diagram on page 7. Add IST, if IST > 0 If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest VON(CL)
Semiconductor Group
4
BTS 707
Parameter and Conditions, each of the two channels
at Tj = 25 C, Vbb = 12 V unless otherwise specified
Symbol
Values min typ max
Unit
Reverse Battery Reverse battery voltage 8) Diagnostic Characteristics Open load detection current Open load detection voltage Short circuit detection voltage (pin 3 to 5)
-Vbb
--
--
32
V
IL(off) Tj =-40..+150C: VOUT(OL) VON(SC)
-2.4 --
6 3 2.5
-4 --
A V V
Input and Status Feedback9) Input resistance
(see circuit page 7)
RI VIN(T+) VIN(T-) VIN(T) VIN = 0.4 V: IIN(off) VIN = 2.5 V: IIN(on) td(ST OL3)
-1 0.8 -1 10 --
20 --0.5 -25 200
-2.5 --30 70 --
k V V V A A s
Input turn-on threshold voltage Input turn-off threshold voltage Input threshold hysteresis Off state input current On state input current Delay time for status with open load
(see timing diagrams, page 10)
Status output (open drain) Zener limit voltage Tj =-40...+150C, IST = +1.6 mA: VST(high) ST low voltage Tj =-40...+150C, IST = +1.6 mA: VST(low)
5.4 --
6.1 --
-0.4
V
8)
9)
Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 7). If ground resistors RGND are used, add the voltage drop across these resistors.
Semiconductor Group
5
BTS 707 Truth Table
Channel 1 Channel 2 Normal operation Open load Short circuit to GND Short circuit to Vbb Overtemperature Undervoltage Overvoltage Input 1 Output 1 Status 1 Input 2 Output 2 Status 2 BTS 707 level level L L L H H H Z L H H H H L L L H L L L H H H H H L L L H L L L L L H L L no overvoltage shutdown, see normal operation
Parallel switching of channel 1 and 2 is easily possible by connecting the inputs and outputs in parallel. The status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor.
Terms
Ibb V bb Leadframe I IN1 3 I ST1 V IN1 VST1 4 ST1 IN1 Vbb I L1 PROFET Chip 1 GND1 2 R GND1 IGND1 VOUT1 OUT1 17,18 V VON1 I ST2 V ST2 8 ST2 I IN2 7 IN2 Leadframe Vbb I L2 PROFET Chip 2 GND2 6 R GND2 I GND2 VOUT2 OUT2 13,14 VON2
IN2
Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20 External RGND optional; two resistors RGND1, RGND2 = 150 or a single resistor RGND = 75 for reverse battery protection up to the max. operating voltage.
Semiconductor Group
6
BTS 707
Input circuit (ESD protection), IN1 or IN2
R IN I
VZ
Inductive and overvoltage output clamp,
OUT1 or OUT2
+Vbb
ESD-ZD I GND
I
I
V ON OUT
ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V).
PROFET
Power GND
Status output, ST1 or ST2
+5V
VON clamped to VON(CL) = -- V typ.
Overvoltage protection of logic part
GND1 or GND2
R ST(ON)
ST
+ V bb
GND
ESDZD
IN
V
RI Logic
Z2
ESD-Zener diode: 6.1 V typ., max 5.0 mA; RST(ON) < 0 at 1.6 mA, ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V).
R ST
ST V
Z1
PROFET
GND
Short Circuit detection
Fault Signal at ST-Pin: VON > 2.5 V typ, no switch off by the PROFET itself, external switch off recommended!
+ V bb
R GND
Signal GND
VZ1 = 6.1 V typ., VZ2 = 70 V typ., RI = 20 k typ., RGND = 150 , RST = 15 k nominal.
V ON
Open-load detection, OUT1 or OUT2
OFF-state diagnostic condition: VOUT > 3 V typ.; IN low
OUT
Logic unit
Short circuit detection
OFF
I L(OL) V OUT
Logic unit
Open load detection
Signal GND
Semiconductor Group
7
BTS 707
GND disconnect Inductive load switch-off energy dissipation
E bb E AS Vbb PROFET OUT L GND ZL ELoad
IN
Vbb PROFET OUT
IN
ST GND V bb V IN V ST V GND
=
ST
{
R L
EL
ER
Any kind of load. In case of IN = high is VOUT VIN - VIN(T+). Due to VGND > 0, no VST = low signal available.
Energy stored in load inductance:
GND disconnect with GND pull up
EL = 1/2*L*I L
While demagnetizing load inductance, the energy dissipated in PROFET is
2
IN
Vbb PROFET OUT
EAS= Ebb + EL - ER= VON(CL)*iL(t) dt,
with an approximate solution for RL > 0 : IL* L (V + |VOUT(CL)|) 2*RL bb IL*RL
OUT(CL)|
ST GND
EAS=
ln (1+ |V
)
V
V bb
V IN ST
V
GND
Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND > 0, no VST = low signal available.
Vbb disconnect with energized inductive load
high
IN
Vbb PROFET OUT
ST GND
V
bb
For an inductive load current up to the limit defined by EAS (max. ratings ) each switch is protected against loss of Vbb. Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load the whole load current flows through the GND connection.
Semiconductor Group
8
BTS 707
Timing diagrams
Both channels are symmetric and consequently the diagrams are valid for channel 1 and channel 2
Figure 1a: Vbb turn on, : Figure 3a: Short circuit: shut down by overtempertature, reset by cooling
IN
IN
V bb
t d(bb IN) V OUT normal operation Output short to GND
V
OUT
I A ST open drain t A
in case of too early VIN=high the device may not turn on (curve A) td(bb IN) approx. 150 s
L
I
L(SCp) I L(SCr)
ST t
Heating up requires several milliseconds, depending on external conditions. External shutdown in response to status fault signal recommended.
Figure 2a: Switching an inductive load
IN
ST
V
OUT
I
L
t
Semiconductor Group
9
BTS 707
Figure 4a: Overtemperature: Reset if Tj IN
IN
ST
ST
V
OUT
V
OUT
VOUT(OL) T
J
I
L
normal *)
open
normal *) t
t
*) IL = 6 A typ
Figure 5a: Open load, : detection in OFF-state, turn on/off to open load
Figure 6a: Undervoltage:
IN
IN t d(ST OL3)
ST
V bb V
bb(under)
Vbb(u cp) Vbb(u rst)
V
OUT
V OUT
I
L
open
normal ST open drain *) t t
td(ST,OL3) depends on external circuitry because of high impedance *) IL = 6 A typ
Semiconductor Group
10
BTS 707
Figure 6b: Undervoltage restart of charge pump
V on
off-state
V bb(u V V bb(under) Vbb
charge pump starts at Vbb(ucp) =5.6 V typ.
bb(u cp)
Figure 7a: Overvoltage, no shutdown:
IN
Vbb
VON(CL)
V
OUT
VOUT(OL)
ST
on-state
t
Semiconductor Group
11
BTS 707
Package and Ordering Code
Standard P-DSO-20-9
BTS 707 Ordering Code Q67060-S7010-A2
All dimensions in millimetres 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side
Definition of soldering point with temperature Ts: upper side of solder edge of device pin 15.
Pin 15
Printed circuit board (FR4, 1.5mm thick, one layer 70m, 6cm2 active heatsink area) as a reference for max. power dissipation Ptot, nominal load current IL(NOM) and thermal resistance Rthja
Semiconductor Group
12


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