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CXP861P16
CMOS 8-bit Single-chip Microcomputer For the availability of this product, please contact the sales office.
Description The CXP861P16 is a highly integrated CMOS 8-bit single-chip microcomputer which is mainly composed of an 8-bit CPU, PROM, RAM and I/O ports. This microcomputer features many other highperformance circuits in a single-chip CMOS design, including an A/D converter, clock synchronized serial interface, UART, stepping motor controller, PWM generator, 16-bit timer/counter, and watchdog timer. Also, the CXP861P16 provides the power-on reset function as well as the sleep/stop function which enables to lower power consumption. This IC is the PROM-incorporated version of the CXP86116 with built-in mask ROM. This provides the additional feature of being able to write directly into the program. Thus, it is most suitable for evaluation use during system development and for smallquantity production. 80 pin QFP (PIastic)
Structure Silicon gate CMOS IC
Features * Instruction set which supports a wide array of data types 213 types -- 16-bit arithmetic instruction/multiplication and division instructions/boolean bit operation * Minimum instruction cycle During operation 400ns/instruction 10MHz * Incorporated PROM capacity 16K bytes * Incorporated RAM capacity 576 bytes * Peripheral functions -- A/D converter 8-bit, 8-channel, successive comparison type (conversion time: 32s at 10MHz) -- Serial interface Universal Asynchronous Receiver Transmitter (baud-rate generator incorporated) 8-bit clock synchronized type -- Stepping motor controller 2-channel stepping motor excitation output -- PWM output 2-channel 12-bit output -- Timer 2-channel 16-bit capture timer/counter 2-channel 16-bit timer/counter (step rate generation function incorporated) 19-bit time-base timer -- Watchdog timer * Interrupts 17 factors, 15 vectors, multiple interrupt processing * Standby mode SLEEP/STOP * Package 80-pin plastic QFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E95308-ST
Block Diagram
AVDD
AVREF
AVSS
NMI
EXTAL
VDD Vss
PI1/INT0
PI3/INT1
PG2/INT2
PH0/RxD
UART RECEIVER
PORT A
PF0/AN0 to PF7/AN7
8
A/D CONVERTER
PG3/INT3
XTAL RST MP
Vpp
SPC700 CPU CORE
CLOCK GENERATOR/ SYSTEM CONTROL
8
PA0 to PA7
UART BAUD RATE GENERATOR
PROM 16K BYTES
RAM 576 BYTES
PORT B
PH1/TxD
UART TRANSMITTER
8
PB0 to PB7
PI2/EC1 PI3/CINT1 PG5/TO1
16BIT TIMER/COUNTER 1 4 4 PF0 to PF3 PF4 to PF7
PG2/EC2
16BIT TIMER/COUNTER 2
PG3/EC3
16BIT TIMER/COUNTER 3
PORT I 4
PORT H 8
PORT G 2 4 2
PH2/PWM0
12BIT PWM GENERATOR 0
PH3/PWM1
12BIT PWM GENERATOR 1
STEPPING STEPPING MOTOR MOTOR CONTROLLER CONTROLLER CH-Y CH-X
PE0/Xa
PE1/Xb
PE2/Xc
PE6/Yc
PE3/Xd
PE4/Ya
PE5/Yb
PE7/Yd
PI0 to PI3
PH0 to PH7
PG6, PG7
PG2 to PG5
PG0, PG1
PORT F
PORT E
PI0/EC0 PI1/CINT0 PG4/TO0 WATCHDOG TIMER
16BIT TIMER/COUNTER 0
PRESCALER/ TIME BASE TIMER
PORT D
PH5/S0 PH6/S1
SERIAL INTERFACE UNIT
INTERRUPT CONTROLLER
PH4/SCK
PORT C
8
PC0 to PC7
-2-
8
PD0 to PD7
8
PE0 to PE7
CXP861P16
CXP861P16
Pin Configuration (Top View)
PE0/Xa
PE1/Xb
PA2
PA3
PA4
PA5
PA6
PA7
Vpp
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 PA1 PA0 PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0 PD7 PD6 PD5 PD4 PD3 PD2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 PE6/Yc PE7/Yd PG0 PG1 PG2/EC2/INT2 PG3/EC3/INT3 PG4/TO0 PG5/TO1 PG6 PG7 PI0/EC0 PI1/CINT0/INT0 PI2/EC1 PI3/CINT1/INT1 PF0/AN0 PF1/AN1 PF2/AN2 PF3/AN3 PF4/AN4 PF5/AN5 PF6/AN6 PF7/AN7 AVDD AVREF
Vss
NMI
VDD
PE2/Xc
PE3/Xd
PE4/Ya PH0/RxD
Note) 1. Vpp (Pin 74) is always connected to VDD. 2. Vss (Pins 33 and 73) are both connected to GND. 3. MP (Pin 31) is always connected to VSS.
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PH3/PWM1
PH2/PWM0
PH4/SCK
PH1/TxD
PH5/SO
PH6/SI
EXTAL
XTAL
AVSS
RST
PD1
PD0
PH7
VSS
MP
PE5/Yb
CXP861P16
Pin Description Symbol PA0 to PA7 I/O Output Description (Port A) 8-bit output port. 12mA sink current can be driven. (8 pins) (Port B) 8-bit output port. (8 pins) (Port C) 8-bit I/O port. Enable to specify input/output by 4-bit unit. (8 pins) (Port D) 8-bit I/O port. Enable to specify input/output by 4-bit unit. (8 pins) (Port E) 8-bit I/O port. I/O can be selected in a unit of 4 bits. (8 pins) Output for stepping motor control circuit CH-X. (4 pins) Output for stepping motor control circuit CH-Y. (4 pins)
PB0 to PB7
Output
PC0 to PC7
I/O
PD0 to PD7 PE0/Xa to PE3/Xd PE4/Ya to PE7/Yd PF0/AN0 to PF3/AN3 PF4/AN4 to PF7/AN7 PG0 PG1
PG2/EC2/INT2 PG3/EC3/INT3
I/O
I/O/output
I/O/output
Input/input
Output/input
(Port F) Input port for the lower 4 bits; output port for the upper 4 bits. (8 pins) (Port G) I/O port for the lower 6 bits; output port for the upper 2 bits. Enable to specify input/output by bit unit. (8 pins)
Analog input to A/D converter. (8 pins)
I/O I/O/input/input I/O/output Output I/O/input I/O/output I/O/output I/O/output I/O/I/O I/O/output I/O/input I/O
External event input for timer/counter 2 and 3.
Input for external interrupt request.
PG4/TO0 PG5/TO1 PG6 PG7 PH0/RxD PH1/TxD PH2/PWM0 PH3/PWM1 PH4/SCK PH5/SO PH6/SI PH7
Output for capture and timer/counter. (2 pins)
Input for UART reception data. Output for UART transmission data. (Port H) 8-bit I/O port. Enable to specify input/output by bit unit. (8 pins) PWM output. (2 pins) I/O for serial clock. Output for serial data. Input for serial data.
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CXP861P16
Symbol PI0/EC0 PI1/CINT0 / INT0 PI2/EC1 PI3/CINT1/ INT1 NMI EXTAL XTAL RST MP AVDD AVREF AVss VDD Vpp Vss Input Input Input Output I/O Input
I/O
Description External event input for timer/counter 0. (Port I) 4-bit input port. (4 pins) Capture input for timer/counter 0. Input for external interruption request.
Input/input/input
External event input for timer/counter 1. Capture input for timer/counter 1. Input for external interruption request.
Non-maskable interruption request for active at falling edge. Crystal connection for system clock oscillation. Input the clock to EXTAL pin and at the same time input the clock with reversed phase to XTAL pin when clock is input externally. System reset for active at low level. RST pin becomes I/O pin, and outputs low level at the power on with power-on reset function executed. (mask option) Always connect to VSS. Positive power supply for A/D converter. Reference supply voltage input for A/D converter. GND for A/D converter. Positive power supply. Positive power supply for built-in PROM writing. Connect to VDD for normal operation. GND. Connect both of Vss to GND.
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CXP861P16
I/O Circuit Formats for Pins Pin Port A PA0 to PA7 PB0 to PB7 Port B
Port A or Port B data High current 12mA (only for port A)
Circuit format
When reset
Hi-Z
Hi-Z control
16 pins Port C
Port C data
PC0 to PC7
Port C I/O direction IP Data bus RD (Port C) Data bus Input protection circuit
Hi-Z
TTL level input RD
8 pins Port D
Port D data
PD0 to PD5
Port D I/O direction IP Data bus RD (Port D)
Hi-Z
6 pins Port D
Port D data
PD6 PD7
Port D I/O direction IP Data bus RD (Port D)
Hi-Z
2 pins
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CXP861P16
Pin Port E PE0/Xa PE1/Xb PE2/Xc PE3/Xd PE4/Ya PE5/Yb PE6/Yc PE7/Yd
Port E/ excitation output selection Stepping motor excitation output Port E data Port E I/O direction
Circuit format
When reset
MPX
Hi-Z
IP
Data bus
8 pins Port F
RD (Port E)
Input multiplexer
PF0/AN0 to PF3/AN3
IP
A/D converter
Hi-Z
Data bus
4 pins Port F
Port F data
RD (Port F)
PF4/AN4 to PF7/AN7
Data bus RD (Port F) Port F selection A/D converter IP
Hi-Z
4 pins Port G
Port G data
Input multiplexer
PG0 PG1
Port G I/O direction
IP
Hi-Z
Data bus
2 pins
RD (Port G)
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CXP861P16
Pin Port G
Port G data
Circuit format
When reset
PG2/EC2/INT2 PG3/EC3/INT3
Port G I/O direction
Hi-Z
Data bus RD (Port G) To timer/counter 2, 3 To interruption circuit IP
2 pins
Schmitt input
Port G
Port G/ timer output selection From timer/counter 0, 1
MPX
PG4/TO0 PG5/TO1
Port G data
H level
Port G I/O direction IP Data bus
2 pins Port G PG6 PG7 2 pins Port H
RD (Port G)
Port G data Data bus RD (Port G)
Hi-Z
Port H data
PH0/RxD PH6/SI
Port H I/O direction
Hi-Z
IP
Data bus RD (Port H) To UART To serial interface
2 pins
Schmitt input
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CXP861P16
Pin Port H
Circuit format
When reset
Port H/ each output selection
PH1/TxD PH2/PWM0 PH3/PWM1 PH5/SO
From UART, PWM serial interface Port H data
MPX
Hi-Z
Port H I/O direction IP Data bus RD (Port H)
4 pins Port H
SCK output enable From serial interface Port H data Port H I/O direction IP Data bus RD (Port H)
MPX
PH4/SCK
Hi-Z
1 pin Port H
To serial interface
Schmitt input
Port H data
PH7
Port H I/O direction IP
Hi-Z
Data bus RD (Port H)
1 pin
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CXP861P16
Pin Port I PI0/EC0 PI1/CINT0/INT0 PI2/EC1 PI3/CINT1/INT1 4 pins
Circuit format
Schmitt input IP To timer/counter 0, 1 To interruption circuit Data bus RD (Port I)
When reset
Hi-Z
EXTAL XTAL
* Diagram shows the circuit configuration during oscillation. EXTAL IP * Feedback resistor is removed during stop.
Oscillation
2 pins
XTAL
Pull-up resistor
RST
Mask option
Schmitt input
OP
IP From power-on reset circuit (mask option)
L level
1 pin
MP
IP CPU mode
Hi-Z
1 pin
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CXP861P16
Absolute Maximum Ratings Item Symbol VDD Vpp Power supply voltage AVDD AVSS Input voltage Output voltage High level output current High level total output current Low level output current Low level total output current Operating temperature Storage temperature Allowable power dissipation VIN VOUT IOH IOH IOL IOLC IOL Topr Tstg PD Rating -0.3 to +7.0 -0.3 to +13.0 AVSS to +7.01 -0.3 to +0.3 -0.3 to +7.02 -0.3 to +7.02 -5 -50 15 20 130 -10 to +75 -55 to +150 600 Unit V V V V V V mA mA mA mA mA C C mW Total output pins Incorporated PROM Remarks
(Vss = 0V)
Other than high current output pins: per pin High current port pin3: per pin Total output pins
Note) Usage exceeding absolute maximum ratings may permanently impair the LSI. Normal operation should better take place under the recommended operating conditions. Exceeding those conditions may adversely affect the reliability of the LSI. 1 AVDD and VDD should be set to a same voltage. 2 VIN and VOUT should not exceed VDD + 0.3V. 3 The high current operation transistors are the N-CH transistors of the PA port.
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CXP861P16
Recommended Operating Conditions Item Symbol Min. 4.5 VDD 3.5 2.5 Vpp Analog power supply AVDD VIH High level input voltage VIHS VIHT VIHEX VIL Low level input voltage VILS VILT VILEX Operating temperature Topr Max. 5.5 5.5 5.5 V V V V V V V V V V C V Unit Remarks
(Vss = 0V)
Guaranteed range during high speed mode (1/2 dividing clock) operation Guaranteed range during low speed mode (1/16 dividing clock) operation Guaranteed data hold operation range during STOP 6 1 2 CMOS schmitt input3 TTL input4 EXTAL pin5 2 CMOS schmitt input3 TTL input4 EXTAL pin5
Power supply voltage
Vpp = VDD 4.5 0.7VDD 0.8VDD 2.0 VDD - 0.4 0 0 0 -0.3 -10 5.5 VDD VDD VDD VDD + 0.3 0.3VDD 0.2VDD 0.8 0.4 +75
1 AVDD and VDD should be set to a same voltage. 2 Normal input port (each pin of PD, PE, PF0 to PF3, PG0, PG1, PG4, PG5, PH1 to PH3, PH5, PH7), MP pin. 3 Each pin of NMI, PH6/SI, PH4/SCK, PH0/RxD, RST, PI0/EC0, PI1/CINT0/INT0, PI2/EC1, PI3/CINT1/INT1, PG2/EC2/INT2, PG3/EC3/INT3. 4 Each pin of PC. 5 It specifies only when the external clock is input. 6 Vpp and VDD should be set to the same voltage.
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CXP861P16
Electrical Characteristics DC Characteristics Item High level output voltage Low level output voltage
Symbol
(Ta = -10 to +75C, Vss = 0V) Pin PA to PE, PF4 to PH7 PG, PH RST (VOL only) PA IIHE EXTAL RST PA to PI, MP Condition VDD = 4.5V, IOH = -0.5mA VDD = 4.5V, IOH = -1.2mA VDD = 4.5V, IOL = 1.8mA VDD = 4.5V, IOL = 3.6mA VDD = 4.5V, IOL = 12.0mA VDD = 5.5V, VIH = 5.5V VDD = 5.5V, VIL = 0.4V VDD = 5.5V, VIL = 0.4V VDD = 5.5V V1 = 0, 5.5V Crystal oscillation (C1 = C2 = 12pF) of 12MHz VDD = 5V 0.5V2 VDD SLEEP mode VDD = 5V 0.5V IDDS2 Other than VDD, VSS, AVDD, AVSS pins STOP mode VDD = 5V 0.5V 30 A 20 0.5 -0.5 -1.5 Min. 4.0 3.5 0.4 0.6 1.5 40 -40 -400 10 Typ. Max. Unit V V V V V A A A A
VOH
VOL
Input current
IILE IILR
I/O leakage current
IIZ
IDD Supply current1
45
mA
IDDS1
0.8
5
mA
Input capacity
CIN
Clock 1MHz 0V other than the measured pins
10
20
pF
1 When entire output pins are open. 2 When setting upper 2 bits (CPU clock selection) of clock control register CLC (address: 00FEH) to "00" and operating in high speed mode (1/2 dividing clock).
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CXP861P16
AC Characteristics (1) Clock timing Item System clock frequency System clock input pulse width System clock input rising and falling times Event clock input pulse width Event count clock input rising and falling times Symbol fC Pin XTAL EXTAL EXTAL EXTAL
(Ta = -10 to +75C, VDD = 4.5 to 5.5V, Vss = 0V) Condition Fig. 1, Fig. 2 Fig. 1, Fig. 2 (External clock drive) Fig. 1, Fig. 2 (External clock drive) 2tsys 20 Min. 1 40 200 Max. 10 Unit MHz ns ns ns ms
tXL, tXH tCR, tCF tEH, tEL tER, tEF
EC0, EC1 Fig. 3 EC2, EC3 EC0, EC1 Fig. 3 EC2, EC3
tsys indicates three values according to the contents of the clock control register (address; 00FEH) upper 2 bits (CPU clock selection). tsys [ns] = 2000/fc (Upper 2-bit = "00"), 4000/fc (Upper 2-bit = "01"), 16000/fc (Upper 2-bit = "11")
Fig. 1. Clock timing
1/fc
VDD - 0.4V EXTAL 0.4V
tXH
tCF
tXL
tCR
Fig. 2. Clock applying condition
Crystal oscillation Ceramic oscillation
External clock
EXTAL
XTAL
EXTAL
XTAL
C1
C2
74HC04
Fig. 3. Event count clock timing
EC0 EC1 EC2 EC3 tEH tEF tEL tER
0.8VDD 0.2VDD
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CXP861P16
(2) Serial transfer Item SCK cycle time SCK high and low level widths SI input setup time (against SCK ) SI input hold time (against SCK ) SCK SO delay time Symbol Pin SCK Condition Input mode Output mode SCK Input mode Output mode SI
(Ta = -10 to +75C, VDD = 4.5 to 5.5V, Vss = 0V) Min. 1000 16000/fc 400 8000/fc - 50 100 200 200 100 200 100 Max. Unit ns ns ns ns ns ns ns ns ns ns
tKCY tKH tKL tSIK tKSI tKSO
SCK1 input mode SCK1 output mode
SI
SCK1 input mode SCK1 output mode
SO
SCK1 input mode SCK1 output mode
Note) The load of SCK1 outptut mode and SO1 output delay time is 50pF + 1TTL.
Fig. 4. Serial transfer timing
tKCY tKL tKH
0.8VDD SCK1 0.2VDD
tSIK
tKSI
0.8VDD SI1 Input data 0.2VDD
tKSO
0.8VDD SO1 0.2VDD Output data
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CXP861P16
(3) A/D converter characteristics (Ta = -10 to +75C, VDD = AVDD = 4.5 to 5.5V, AVREF = 4.0 to AVDD, Vss = AVSS = 0V) Item Resolution Absolute error Conversion time Sampling time Ta = 25C VDD = AVDD = 5.0V VSS = AVSS = 0V Symbol Pin Condition Min. Typ. Max. 8 3 160/fADC 12/fADC AVREF AN0 to AN7 Operating mode AVREF SLEEP mode STOP mode AVDD - 0.5 0 0.6 AVDD AVREF 1.0 10 Unit Bits
LSB s s V V mA A
tCONV tSAMP
VIAN IREF
Reference input voltage VREF Analog input voltage AVREF current
IREFS
The value of fADC is as follows by selecting ADC operation clock (MSC: Address 01FFH bit 0). When PS2 is selected, fADC = fc/2 When PS1 is selected, fADC = fc
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CXP861P16
(4) Interruption, reset input Item
(Ta = -10 to +75C, VDD = 4.5 to 5.5V, Vss = 0V) Symbol Pin INT0 INT1 INT2 INT3 NMI RST Min. Typ. Max. Unit
External interruption high and low level widths
tIH tIL tRSL
1
s
Reset input low level width Fig. 5. Interruption input timing
INT0 INT1 INT2 INT3 NMI (Falling edge)
8/fc
s
tIH
tIL
0.8VDD 0.2VDD
Fig. 6. Reset input timing
tRSL
RST 0.2VDD
(5) Power on reset Item Power supply rising time Power supply cut-off time Symbol Pin VDD
(Ta = -10 to +75C, VDD = 4.5 to 5.5V, Vss = 0V) Condition Power on reset Repetitive power on reset Min. 0.05 1 Max. 50 Unit ms ms
tR tOFF
Fig. 7. Power on reset
4.5V VDD 0.2V 0.2V tR The power supply should be rise smoothly. tOFF
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CXP861P16
Supplement Fig. 8. Recommended oscillation circuit
(i) (ii)
EXTAL
XTAL Rd
EXTAL
XTAL Rd
C1
C2 C1 C2
Manufacturer
Model CSA8.00MTZ
fc (MHz) 8.00
C1 (pF) 30
C2 (pF) 30
Rd () 0
Circuit example (i) (ii)
MURATA MFG CO., LTD.
CST8.00MTW CSA10.0MTZ CST10.0MTW
10.00 8.00 10.00 8.00 10.00
30
30
0
(i) (ii)
RIVER ELETEC HC-49/U03 CO., LTD. KINSEKI LTD. HC-49/U (-S)
12
12
470
(i)
22
22
0
(i)
Those marked with an asterisk () signify types with built-in ground capacitance. (C1, C2)
Mask option table Item Reset pin pull-up resistor Power on reset circuit Mask product Non-existent/Existent Non-existent/Existent CXP861P16Q-1Existent Existent
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CXP861P16
Package Outline
Unit: mm
80PIN QFP (PLASTIC)
23.9 0.4 + 0.4 20.0 - 0.1 64 41 + 0.1 0.15 - 0.05 0.15
65
40
+ 0.4 14.0 - 0.1
17.9 0.4
A 80 25 + 0.2 0.1 - 0.05
0.8
0.12
M
+ 0.15 0.35 - 0.1
+ 0.35 2.75 - 0.15
0 to 10 DETAIL A
PACKAGE STRUCTURE
PACKAGE MATERIAL EPOXY RESIN SOLDER PLATING COPPER / 42 ALLOY 1.6g QFP-80P-L01 LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT
SONY CODE EIAJ CODE JEDEC CODE
QFP080-P-1420-A
- 19 -
0.8 0.2
1
24
16.3

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