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(R)
ESDA6V1-5W6
A.S.D.a
Application Specific Discretes
TRANSILTM ARRAY FOR ESD PROTECTION
APPLICATIONS Where transient overvoltage protection in ESD sensitive equipment is required, such as : n Computers n Printers n Communication systems n Cellular phone handsets and accessories n Other telephone sets n Set top boxes DESCRIPTION The ESDA6V1-5W6 is a 5-bit wide monolithic suppressor which is designed to protect components connected to data and transmission lines against ESD.
SOT323-6L
FUNCTIONAL DIAGRAM
I/O1
FEATURES
n n n n
I/O5 I/O4
5 UNIDIRECTIONAL TRANSILTM FUNCTIONS BREAKDOWN VOLTAGE: VBR = 6.1V min LOW LEAKAGE CURRENT: IR max < 1 A VERY SMALL SIZE FOR PCB SPACE SAVING: 4.2mm2 TYPICALLY
Gnd
I/O2
I/O3
BENEFITS
n n
High integration Suitable for high density boards
ESD response to IEC61000-4-2 (air discharge 16kV, positive surge)
COMPLIES WITH THE FOLLOWING STANDARDS: - IEC 61000-4-2: level 4 15 kV (air discharge) 8 kV (contact discharge) - MIL STD 883C-Method 3015-6: class3 (human body model)
March 2000 - Ed: 1A
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ESDA6V1-5W6
ABSOLUTE MAXIMUM RATINGS (Tamb = 25C) Symbol VPP Test conditions ESD discharge - MIL STD 883C - Method 3015-6 IEC 61000-4-2 air discharge IEC 61000-4-2 contact discharge Peak pulse power (8/20s) Junction temperature Storage temperature range Lead solder temperature (10 seconds duration) Operating temperature range (note 1) Value 25 20 15 100 150 -55 to +150 260 -40 to +125 Unit kV
PPP Tj Tstg TL Top
W C C C C
Note 1: The evolution of the operating parameters versus temperature is given by curves and T parameter.
ELECTRICAL CHARACTERISTICS (Tamb = 25C) Symbol VRM VBR VCL IRM IPP T C Rd VF Parameter
I
Stand-off voltage Breakdown voltage Clamping voltage Leakage current Peak pulse current Voltage temperature coefficient Capacitance Dynamic impedance Forward voltage drop
Slope = 1/Rd
IF
VBR Vcl VRM IRM
VF V
IPP
VBR @ IR min. Type max .
IRM @ VRM max.
Rd typ. note 2
T max. note 3 10-4/C 6
C typ. 0V bias pF 50
VF @ IF max
V ESDA6V1-5W6 6.1
V 7.2
mA 1
A 1
V 3
m 610
V 1.25
mA 200
Note 2 : Square pulse, Ipp = 15A, tp=2.5s. Note 3: VBR = T * (Tamb - 25C) * VBR (25C)
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Fig. 1: Peak power dissipation versus initial junction temperature.
Ppp[Tj initial]/Ppp[Tj initial=25C] 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0
1000
Fig. 2: Peak pulse power versus exponential pulse duration (Tj initial = 25C).
Ppp(W)
100
Tj initial(C) 0 25 50 75 100 125 150 175
10 1
tp(s)
10 100
Fig. 3: Clamping voltage versus peak pulse current (Tj initial = 25C) Rectangular waveform tp = 2.5s.
Fig. 4: Capacitance versus reverse applied voltage (typical values).
Ipp(A)
50.0
tp=2.5s
C(pF)
50 40 30
F=1MHz Vosc=30mV
10.0
1.0
20
Vcl(V)
0.1 0 5 10 15 20 25 30 35 40
10 0.5 1.0 1.5 2.0
VR(V)
2.5 3.0 3.5 4.0 4.5 5.0
Fig. 5: Relative variation of leakage current versus junction temperature (typical values).
Fig. 6: Peak forward voltage drop versus peak forward current (typical values).
IR[Tj] / IR[Tj=25C]
50
IFM(A)
1E+0
Tj=25C
10
1E-1
1E-2
Tj(C)
1 25 50 75 100 125
VFM(V) 1E-3 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6
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ESDA6V1-5W6
APPLICATION EXAMPLE
Implementation of ESDA6V1-5W6 in a typical application
TECHNICAL INFORMATION ESD PROTECTION The ESDA6V1-5W6 is particularly optimized to perform ESD protection. ESD protection is achieved by clamping the unwanted overvoltage. The clamping voltage is given by the following formula :
Vcl = Vbr + Rd Ipp
As shown in figure A1, the ESD strikes are clamped by the transient voltage suppressor.
Fig. A1: ESD clamping behavior
Rg
Rd
IC to be protected
Connector
Vg
Vbr
Voutput
Rload
Device to be protected
ESD Surge
ESDA6V1-5W6
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ESDA6V1-5W6
To have a good approximation of the remaining voltages at both Vi/o side, we provide the typical dynamical resistance value Rd. By taking into account the following hypothesis : Rg > Rd and Rload > Rd we have:
Vin = Vbr + Rd x
Vg Rg
The results of the calculation done for Vg = 8 kV, Rg = 330 (IEC 61000-4-2 standard), Vbr = 6.4 V (typ.) and Rd = 0.61 (typ.) give: Vouput = 21.2 V This confirms the very low remaining voltage across the device to be protected. It is also important to note that in this approximation the parasitic inductance effect was not taken into account. This could be a few tenths of volts during a few ns at the Vi/o side.
Fig. A2: Measurement conditions:
ESD SURGE 16kV Air Discharge
TEST BOARD
E62
Vi/o
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ESDA6V1-5W6
The measurements done here after show very clearly (Fig. A3) the high efficiency of the ESD protection: the clamping voltage Vout becomes very close to Vbr (positive way, Fig. A3a) and -Vf (negative way, Fig. A3b). Fig. A3: Remaining voltage during ESD surge
a: Vi/o during positive surge
b: Vi/o during negative surge
One can note that the ESDA6V1-5W6 is not only acting for positive ESD surges but also for negative ones. For these kind of disturbances it clamps close to ground voltage as shown in Fig. A3b.
CROSSTALK BEHAVIOR Fig. A4: Crosstalk phenomenon
RG1
Line 1
VG1 RG2
Line 2
RL1
1 VG1 + 12 VG2
VG2
RL2
2 VG2 + 21 VG1
DRIVERS
RECEIVERS
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ESDA6V1-5W6
The crosstalk phenomena are due to the coupling between 2 lines. The coupling factor ( 12 or 21 ) increases when the gap across lines decreases, particularly in silicon dice. In the example above the expected signal on load RL2 is 2VG1. In fact the real voltage at this point has got an extra value 21VG1. This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal or high load impedance (few k). Fig. A5: Analog crosstalk measurements
TEST BOARD
50
E62
Port1 Vg
Port2 50
Fig. A6: Typical analog crosstalk measurements
Analog crosstalk (dB) 0 -20 -40 -60 -80 -100 1 10 100 frequency (MHz) 1,000
Figure A5 gives the measurement circuit for the analog crosstalk application. In figure A6, the curve shows the effect of the cell I/O5 on the cell I/O3. In usual frequency range of analog signals (up to 100MHz) the effect on disturbed line is less than -40dB.
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ESDA6V1-5W6
Fig. A7: Digital crosstalk measurements configuration
+5V 74HC04
+5V
74HC04
Line1
VG1
Square Pulse Generator
ESDA6V1 -5W6
+5V
Line 2
21 VG1
Fig. A8: Digital crosstalk measurements configuration
Figure A7 shows the measurement circuit used to quantify the crosstalk effect in a classical digital application. Figure A8 shows that in such a condition, i.e signal from 0 to 5V and rise time of a few ns, the impact on the disturbed line is less than 50 mV peak to peak. No data disturbance was noted on the concerned line. The measurements performed with falling edges give an impact within the same range. ORDER CODE
ESDA
6V1 VBR min
5
W6
ESD ARRAY 5 lines protected
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SOT323-6L
ESDA6V1-5W6
PACKAGE MECHANICAL DATA SOT323-6L DIMENSIONS
A
A2
A1
REF.
Millimeters Min. Max. 1.1 0.1 1 0.3 0.18 2.2 1.35 2.4 0.4
Inches Min. 0.031 0 0.031 0.006 0.004 0.071 0.045 0.071 0.004 Max. 0.043 0.004 0.039 0.012 0.007 0.086 0.053 0.094 0.016
A A1
D
0.8 0 0.8 0.15 0.1 1.8 1.15 1.8 0.1
A2
e
e
b c D
H
E
E e H
0.65 Typ.
0.025 Typ.
Q
c b
Q
FOOT PRINT
0.3mm
1mm
2.9mm
1mm
0.35mm
MARKING Type ESDA6V1-5W6 Marking E62 Package SOT323-6L Weight 5.4 mg Base Qty 3000 Delivery mode Tape & Reel
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 9/9

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