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High Accuracy anyCAPTM 100 mA Low Dropout Linear Regulator ADP3307
FUNCTIONAL BLOCK DIAGRAM
Q1 IN
FEATURES 0.8% Accuracy Over Line and Load Regulations @ +25 C Ultralow Dropout Voltage: 120 mV Typical @ 100 mA Requires only CO = 0.47 F for Stability anyCAP = Stable with All Types of Output Capacitors (Including MLCC) Current and Thermal Limiting Low Noise Dropout Detector Low Shutdown Current: 1 A 3.0 V to 12 V Supply Range -20 C to +85 C Ambient Temperature Range Several Fixed Voltage Options Ultrasmall SOT-23-6 (RT-6) Package Excellent Line and Load Regulations APPLICATIONS Cellular Telephones Notebook, Palmtop Computers Battery Powered Systems PCMCIA Regulator Bar Code Scanners Camcorders, Cameras
ADP3307
OUT R1
ERR Q2 SD
THERMAL PROTECTION
CC NR DRIVER GM R2 BANDGAP REF
GND
NR
ADP3307-3.3
VIN C1 + 0.47 F - IN OUT ERR ON OFF SD GND R1 330k EOUT VOUT = +3.3V C2 0.47 F
Figure 1. Typical Application Circuit
GENERAL DESCRIPTION
The ADP3307 is a member of the ADP330x family of precision low dropout anyCAP voltage regulators. The ADP3307 stands out from the conventional LDOs with a novel architecture and an enhanced process. Its patented design requires only a 0.47 F output capacitor for stability. This device is stable with any type of capacitor regardless of its ESR (Equivalent Series Resistance) value, including ceramic types (MLCC) for space restricted applications. The ADP3307 achieves exceptional accuracy of 0.8% at room temperature and 1.4% overall accuracy over temperature, line and load regulations. The dropout voltage of the ADP3307 is only 120 mV (typical) at 100 mA. The ADP3307 operates with a wide input voltage range from 3.0 V to 12 V and delivers a load current in excess of 100 mA. It features an error flag that signals when the device is about to
lose regulation or when the short circuit or thermal overload protection is activated. Other features include shutdown and optional noise reduction capabilities. The ADP330x anyCAP LDO family offers a wide range of output voltages and output current levels from 50 mA to 300 mA: ADP3300 (50 mA, SOT-6) ADP3307 (100 mA, SOT) ADP3301 (100 mA, SO-8) ADP3302 (100 mA, Dual Output) ADP3303 (200 mA) ADP3306 (300 mA)
anyCAP is a trademark of Analog Devices, Inc.
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1997
(@ T -20 C ADP3307-SPECIFICATIONS voltage=options.to +85 C, V otherwise noted) The following specifications apply to all
A 1
IN
= 7 V, CIN = 0.47 F, COUT = 0.47 F, unless
Min Typ Max Units
Parameter OUTPUT VOLTAGE ACCURACY
Symbol VOUT
Conditions VIN = VOUTNOM + 0.3 V to 12 V IL = 0.1 mA to 100 mA TA = +25C VIN = VOUTNOM + 0.3 V to 12 V IL = 0.1 mA to 100 mA VIN = VOUTNOM + 0.3 V to 12 V TA = +25C IL = 0.1 mA to 100 mA TA = +25C IL = 100 mA IL = 0.1 mA VIN = 2.5 V IL = 0.1 mA VOUT = 98% of VOUTNOM IL = 100 mA IL = 10 mA IL = 1 mA ON OFF 0 < VSD, < 5 V 5 < VSD 12 V @ VIN = 12 V VSD = 0 V, VIN = 12 V TA = +25C VSD = 0 V, VIN = 12 V TA = +85C TA = +25C @ VIN = 12 V TA = +85C @ VIN = 12 V VEO = 5 V ISINK = 400 A VIN = VOUTNOM + 1 V f = 10 Hz-100 kHz CNR = 0 CNR = 10 nF, CL = 10 F
-0.8 -1.4 0.02 0.06 0.76 0.19 0.6 0.126 0.025 0.004 2.0 0.75 0.75
+0.8 +1.4
% % mV/V mV/mA
LINE REGULATION LOAD REGULATION GROUND CURRENT GROUND CURRENT IN DROPOUT DROPOUT VOLTAGE
V O V IN
V O I L
IGND IGND VDROP
2.0 0.3 1.2 0.22 0.07 0.015 0.3 1 22
mA mA mA V V V V V A A A A A A A V mA V rms V rms
SHUTDOWN THRESHOLD SHUTDOWN PIN INPUT CURRENT
VTHSD ISDIN
GROUND CURRENT IN SHUTDOWN IQ MODE
0.005 0.01
1 3 2 4 13
OUTPUT CURRENT IN SHUTDOWN MODE ERROR PIN OUTPUT LEAKAGE ERROR PIN OUTPUT "LOW" VOLTAGE PEAK LOAD CURRENT OUTPUT NOISE @ 3.3 V OUTPUT
IOSD IEL VEOL ILDPK VNOISE
0.12 170 100 30
0.3
1
NOTES Ambient temperature of +85C corresponds to a junction temperature of 125C under typical full load test conditions.
Specifications subject to change without notice.
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ADP3307
ABSOLUTE MAXIMUM RATINGS* PIN FUNCTION DESCRIPTIONS
Input Supply Voltage . . . . . . . . . . . . . . . . . . . -0.3 V to +16 V Shutdown Input Voltage . . . . . . . . . . . . . . . . -0.3 V to +16 V Error Flag Output Voltage . . . . . . . . . . . . . . . -0.3 V to +16 V Noise Bypass Pin Voltage . . . . . . . . . . . . . . . . -0.3 V to +5 V Power Dissipation . . . . . . . . . . . . . . . . . . . . Internally Limited Operating Ambient Temperature Range . . . -55C to +125C Operating Junction Temperature Range . . . -55C to +125C JA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230C/W JC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92C/W Storage Temperature Range . . . . . . . . . . . . -65C to +150C Lead Temperature Range (Soldering 10 s) . . . . . . . . . +300C Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +220C
*This is a stress rating only; operation beyond these limits can cause the device to be permanently damaged.
Pin 1 2
Name GND NR
Function Ground Pin. Noise Reduction Pin. Used for further reduction of the output noise. (See text for details.) No connection if not used. Active Low Shutdown Pin. Connect to ground to disable the regulator output. When shutdown is not used, this pin should be connected to the input pin. Output of the Regulator, fixed 2.7 V, 3.0 V, 3.2 V or 3.3 V output voltage. Bypass to ground with a 0.47 F or larger capacitor. Regulator Input. Open Collector Output that goes low to indicate that the output is about to go out of regulation.
PIN CONFIGURATION
3
SD
4
OUT
ORDERING GUIDE
5 6
IN ERR
Model ADP3307ART-2.7 ADP3307ART-3 ADP3307ART-3.2 ADP3307ART-3.3
Output Voltage 2.7 V 3.0 V 3.2 V 3.3 V
Package Option RT-6 RT-6 RT-6 RT-6
Marking Code LTC LUC LVC LWC
GND 1 NR 2
ADP3307
6 ERR
Contact the factory for the availability of other output voltage options.
5 IN TOP VIEW SD 3 (Not to Scale) 4 OUT
Other Members of anyCAP Family 1
Model ADP3300 ADP3301 ADP3302 ADP3303 ADP3306
Output Current 50 mA 100 mA 100 mA 200 mA 300 mA
Package Options2 SOT-23-6 SO-8 SO-8 SO-8 SO-8, TSSOP-14
Comments High Accuracy High Accuracy Dual Output High Accuracy High Accuracy, High Current
NOTES 1 See individual data sheets for detailed ordering information. 2 SO = Small Outline, SOT-23 = Surface Mount, TSSOP = Thin Shrink Small Outline.
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADP3307 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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ADP3307-Typical Performance Characteristics
3.202 IL = 0mA 3.201
OUTPUT VOLTAGE - Volts
OUTPUT VOLTAGE - Volts
3.202 VOUT = 3.2V 3.201 IL = 10mA 3.200 3.199 3.198 3.197 3.196 IL = 100mA 3.195 4 5 6 7 8 9 10 11 12 13 14 INPUT VOLTAGE - Volts 0 10 20 30 40 50 60 70 80 OUTPUT LOAD - mA 90 100 VOUT = 3.2V VIN = 7V
GROUND CURRENT - A
800 VOUT = 3.2V IL = 0 640
3.200 3.199 3.198 3.197 3.196 3.195 3.3 IL = 50mA
480
320
160
0 0 1.2 2.4 3.6 4.8 6.0 7.2 8.4 9.6 10.8 12.0 INPUT VOLTAGE - Volts
Figure 2. Line Regulation Output Voltage vs. Supply Voltage
Figure 3. Output Voltage vs. Load Current Up to 100 mA
Figure 4. Quiescent Current vs. Supply Voltage--3.2 V (Both Outputs)
900
0.2
1000
GROUND CURRENT - A
OUTPUT VOLTAGE - %
IL = 0 0.0
GROUND CURRENT - A
750
0.1
800
600
600
-0.1
IL = 50mA
450 IL = 0 TO 100mA 300
400
-0.2 IL = 100mA
-0.3 -0.4 -45 -25
200
150
0
25 50 75 OUTPUT LOAD - mA
100
-5
15 35 55 75 95 115 135 TEMPERATURE - C
0 -25
-5
15 35 55 75 95 TEMPERATURE - C
115 135
Figure 5. Ground Current vs. Load Current
Figure 6. Output Voltage Variation % vs. Temperature
Figure 7. Quiescent Current vs. Temperature
120
5
8.0 INPUT/OUTPUT VOLTAGE - Volts
VOUT = 3.2V RL = 32
VIN 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0 0 20 40 60 80 100 120 140 160 180 200 TIME - s VSD = VIN CL = 0.47 F RL = 32 VOUT = 3.2V VOUT
INPUT/OUTPUT VOLTAGE - Volts
INPUT/OUTPUT VOLTAGE - mV
96
4
72
3
48
2
24
1
0
0 0 25 50 75 OUTPUT LOAD - mA 100
0
1
2 3 4 3 2 INPUT VOLTAGE - Volts
1
0
Figure 8. Dropout Voltage vs. Output Current
Figure 9. Power-Up/Power-Down
Figure 10. Power-Up Overshoot
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ADP3307
3.220 VOUT = 3.2V 3.210 3.200 3.190
VOLTS
3.220 VOUT = 3.2V 3.210 3.200 3.190
VOLTS
3.220 3.210 3.200 3.190 3.180 100 mA 10 VOUT = 3.2V CL = 0.47 F
3.180
RL = 32 CL = 0.47 F VIN
VOLTS
3.180
RL = 3.2k CL = 0.47 F VIN
7.5 7.0
7.5 7.0
0
40 80 120 160 200 240 280 320 360 400 TIME - s
0
20 40 60
80 100 120 140 160 180 200 TIME - s
0
100
200 300 TIME - s
400
500
Figure 11. Line Transient Response
Figure 12. Line Transient Response
Figure 13. Load Transient
3.220 3.210 VOUT = 3.2V CL = 4.7 F 300
4 CL = 0.47 F 3 IOUT 2 3.2V VOUT
VOLTS
3.200 3.190
mA
200 100
VOLTS
0 3.180 4 100
CL = 4.7 F 1 VOUT = 3.2V RL = 32 VSD 3V
VOLTS
VOUT = 3.2V VOUT
mA
2 0
0 3 0
10
0
100
200 300 TIME - s
400
500
0 0.5
1 1.5
2 2.5 3 3.5 TIME - sec
4 4.5
5
0
20
40 60 TIME - s
80
100
Figure 14. Load Transient
Figure 15. Short Circuit Current
Figure 16. Turn On
4 3.2V 3 2 VOLTS 1 0 3 0 VSD VOUT = 3.2V RL = 32 CL = 0.47 F
0 -10 a. 0.47 F, RL = 33k b. 0.47 F, RL = 33 c. 10 F, RL = 33k d. 10 F, RL = 33
VOLTAGE NOISE SPECTRAL DENSITY - V Hz
VOUT = 3.3V b
10 VOUT = 5V, CL = 0.47 F IL = 1mA, CNR = 0 1 VOUT = 3.3V, CL = 0.47 F IL = 1mA, CNR = 0
0.47 F BYPASS PIN 5 TO PIN 1
RIPPLE REJECTION - dB
-20 -30 -40 -50
a -60 -70 b d -80 -90 ac 10 100 100k 1k 10k FREQUENCY - Hz c
d
0.1 VOUT = 2.7- 5.0V, CL = 0.47 F IL = 1mA, CNR = 10nF VOUT = 2.7- 5.0V, CL = 4.7 F IL = 1mA, CNR = 10nF 1k 10k FREQUENCY - Hz 100k
0
10
20 30 TIME - s
40
50
-100
1M
10M
0.01 100
Figure 17. Turn Off
Figure 18. Power Supply Ripple Rejection
Figure 19. Output Noise Density
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ADP3307
THEORY OF OPERATION
The ADP3307 anyCAP LDO uses a single control loop for regulation and reference functions. The output voltage is sensed by a resistive voltage divider consisting of R1 and R2 which is varied to provide the available output voltage option. Feedback is taken from this network by way of a series diode (D1) and a second resistor divider (R3 and R4) to the input of an amplifier.
INPUT Q1 OUTPUT COMPENSATION ATTENUATION R1 CAPACITOR (VBANDGAP/VOUT) PTAT VOS R4 R3 D1 (a) PTAT CURRENT RLOAD
This is no longer true with the ADP3307 anyCAP LDO. It can be used with virtually any good quality capacitor, with no constraint on the minimum ESR. The innovative design allows the circuit to be stable with just a small 0.47 F capacitor on the output. Additional advantages of the design scheme include superior line noise rejection and very high regulator gain that lead to excellent line and load regulation. An impressive 1.4% accuracy is guaranteed over line, load and temperature. Additional features of the circuit include current limit, thermal shutdown and noise reduction. Compared to the standard solutions that give warning after the output has lost regulation, the ADP3307 provides improved system performance by enabling the ERR pin to give warning before the device loses regulation. As the chip's temperature rises above 165C, the circuit activates a soft thermal shutdown, indicated by a signal low on the ERR pin, to reduce the current to a safe level. To reduce the noise gain of the loop, the node of the main divider network (a) is made available at the noise reduction (NR) pin which can be bypassed with a small capacitor (10 nF-100 nF).
APPLICATION INFORMATION Capacitor Selection: anyCAP
NONINVERTING WIDEBAND DRIVER
GM
ADP3307
R2 CLOAD
GND
Figure 20. Functional Block Diagram
A very high gain error amplifier is used to control this loop. The amplifier is constructed in such a way that at equilibrium it produces a large, temperature proportional input "offset voltage" that is repeatable and very well controlled. The gained up temperature proportional offset voltage is combined with the diode voltage to form a "virtual bandgap" voltage, implicit in the network, although it never appears explicitly in the circuit. Ultimately, this patented design makes it possible to control the loop with only one amplifier. This technique also improves the noise characteristics of the amplifier by providing more flexibility on the trade-off of noise sources that leads to a low noise design. The R1, R2 divider is chosen in the same ratio as the bandgap voltage to the output voltage. Although the R1, R2 resistor divider is loaded by the diode D1, and a second divider consisting of R3 and R4, the values are chosen to produce a temperature stable output. The patented amplifier controls a new and unique noninverting driver that drives the pass transistor, Q1. The use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole splitting arrangement to achieve reduced sensitivity to the value, type and ESR of the load capacitance. Most LDOs place strict requirements on the range of ESR values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resistance. Moreover, the ESR value, required to keep conventional LDOs stable, changes depending on load and temperature. These ESR limitations make designing with conventional LDOs more difficult because of their unclear specifications and the dependence of ESR over temperature.
Output Capacitors: as with any micropower device, output transient response is a function of the output capacitance. The ADP3307 is stable with a wide range of capacitor values, types and ESR (anyCAP). A capacitor as low as 0.47 F is all that is needed for stability. However, larger capacitors can be used if high output current surges are anticipated. There is an upper limit on the size of the output capacitor. The ADP3307 is stable with extremely low ESR capacitors (ESR 0), such as multilayer ceramic capacitors (MLCC) or OSCON. Input Bypass Capacitor: an input bypass capacitor is not required; however, for applications where the input source is high impedance or far from the input pins, a bypass capacitor is recommended. Connecting a 0.47 F capacitor from the input to ground reduces the circuit's sensitivity to PC board layout. If a bigger output capacitor is used, the input capacitor should be 1 F minimum.
Noise Reduction
A noise reduction capacitor (CNR) can be used to further reduce the noise by 6 dB-10 dB (Figure 21). Low leakage capacitors in 10 nF-100 nF range provide the best performance. As the noise reduction capacitor increases the high frequency loop-gain of the regulator, the circuit requires a larger output capacitor if it is used. The recommended value is 4.7 F, as shown in Figure 21. Since the noise reduction pin (NR) is internally connected to a high impedance node, any connection to this node should be carefully done to avoid noise pick up from external sources. The pad connected to this pin should be as small as possible. Long PC board traces are not recommended.
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ADP3307
Shutdown Mode
NR
ADP3307-3.3
VIN C1+ 1F IN OUT R1 ERR ON OFF SD GND
CNR 10nF 330k EOUT + VOUT = 3.3V C2 4.7 F
Applying a TTL high signal to the shutdown pin or tying it to the input pin will turn the output ON. Pulling the shutdown pin down to a TTL low level or tying it to ground will turn the output OFF. In shutdown mode, quiescent current is reduced to less than 1 A.
Error Flag Dropout Detector
Figure 21. Noise Reduction Circuit
Thermal Overload Protection
The ADP3307 is protected against damage due to excessive power dissipation by its thermal overload protection circuit, which limits the die temperature to a maximum of 165C. Under extreme conditions (i.e., high ambient temperature and power dissipation), where die temperature starts to rise above 165C, the output current is reduced until the die temperature has dropped to a safe level. Output current is restored when the die temperature is reduced. Current and thermal limit protections are intended to protect the device against accidental overload conditions. For normal operation, device power dissipation should be externally limited so that junction temperatures will not exceed 125C.
Calculating Junction Temperature
The ADP3307 will maintain its output voltage over a wide range of load, input voltage and temperature conditions. If the output is about to lose regulation, for example, by reducing the supply voltage below the combined regulated output and dropout voltages, the ERR pin will be activated. The ERR output is an open collector that will be driven low. Once set, the ERRor flag's hysteresis will keep the output low until a small margin of operating range is restored either by raising the supply voltage or reducing the load.
APPLICATIONS CIRCUITS Crossover Switch
The circuit in Figure 22 shows that two ADP3307s can be used to form a mixed supply voltage system. The output switches between two different levels selected by an external digital input. Output voltages can be any combination of voltages from the Ordering Guide of the data sheet.
VIN = 4V TO 12V OUTPUT SELECT 4V 0V IN OUT VOUT = 2.7V/3.3V
Device power dissipation is calculated as follows: PD = (VIN - VOUT) ILOAD + (VIN) IGND Where ILOAD and IGND are load current and ground current, VIN and VOUT are input and output voltages respectively. Assuming ILOAD= 100 mA, IGND= 2 mA, VIN = 5.5 V and VOUT = 3.3 V, device power dissipation is: PD = (5.5 - 3.3) 0.1 + 5.5 x 2 mA = 0.231 W T = TJ - TA = PD x JA = 0.231 x 165 = 38C With a maximum junction temperature of 125C, this yields a maximum ambient temperature of ~72C.
Printed Circuit Board Layout Consideration
ADP3307-2.7
SD GND
C1 1.0 F
+
IN
OUT
+
ADP3307-3.3
SD GND
C2 0.47 F
Surface mount components rely on the conductive traces or pads to transfer heat away from the device. Appropriate PC board layout techniques should be used to remove heat from the immediate vicinity of the package. The following general guidelines will be helpful when designing a board layout: 1. PC board traces with larger cross section areas will remove more heat. For optimum results, use PC boards with thicker copper and wider traces. 2. Increase the surface area exposed to open air so heat can be removed by convection or forced air flow. 3. Do not use solder mask or silkscreen on the heat dissipating traces because it will increase the junction-to-ambient thermal resistance of the package.
Figure 22. Crossover Switch
Higher Output Current
The ADP3307 can source up to 100 mA without any heatsink or pass transistor. If higher current is needed, an appropriate pass transistor can be used, as in Figure 23, to increase the output current to 1 A.
VIN = 4V TO 8V MJE253* C1 47 F R1 50 VOUT = 3.3V@1A
IN
OUT + C2 10 F
ADP3307-3.3
SD GND ERR
*AAVID531002 HEAT SINK IS USED
Figure 23. High Output Current Linear Regulator
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ADP3307
Constant Dropout Post Regulator
The circuit in Figure 24 provides high precision with low dropout for any regulated output voltage. It significantly reduces the ripple from a switching regulator while providing a constant
L1 6.8 H VIN = 2.5V TO 3.5V C1 100 F 10V R1 120 ILIM VIN SW1 ADP3000-ADJ FB GND SW2 C2 100 F 10V D1 1N5817
dropout voltage, which limits the power dissipation of the LDO to 30 mW. The ADP3000 used in this circuit is a switching regulator in the step-up configuration.
ADP3307-3.3 IN R2 30.1k 1% Q1 2N3906 R3 124k 1% SD GND OUT + 3.3V@100mA C3 2.2 F
Q2 2N3906
R4 274k
Figure 24. Constant Dropout Post Regulator
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
6-Lead Plastic Surface Mount (RT-6)
0.122 (3.10) 0.106 (2.70)
0.071 (1.80) 0.059 (1.50) PIN 1
6 1
5 2
4 3
0.118 (3.00) 0.098 (2.50)
0.037 (0.95) BSC 0.075 (1.90) BSC 0.051 (1.30) 0.035 (0.90) 0.059 (0.15) 0.000 (0.00) 0.057 (1.45) 0.035 (0.90) 0.020 (0.50) SEATING 0.010 (0.25) PLANE 10 0.009 (0.23) 0 0.003 (0.08) 0.022 (0.55) 0.014 (0.35)
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PRINTED IN U.S.A.
C3234-8-12/97

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