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INTEGRATED CIRCUITS 74LVC16240A 16-bit buffer/line driver; inverting (3-State) Product specification Supersedes data of 1995 Dec 26 IC24 Data Handbook 1997 Jul 29 Philips Semiconductors Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A FEATURES * 5 volt tolerant inputs/outputs for interfacing with 5V logic * Wide supply voltage range of 1.2V to 3.6V * Complies with JEDEC standard no. 8-1A * CMOS low power consumption * MULTIBYTETM flow-through standard pin-out architecture * Low inductance multiple power and ground pins for minimum noise and ground bounce PIN CONFIGURATION 1OE 1Y0 1Y1 GND 1Y2 1Y3 VCC 2Y0 2Y1 1 2 3 4 5 6 7 8 9 48 2OE 47 1A0 46 1A1 45 GND 44 1A2 43 1A3 42 VCC 41 2A0 40 2A1 39 GND 38 2A2 37 2A3 36 3A0 35 3A1 34 GND 33 3A2 32 3A3 31 VCC 30 4A0 29 4A1 28 GND 27 4A2 26 4A3 25 3OE * Direct interface with TTL levels DESCRIPTION The 74LVC16240A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. These features allow the use of these devices in a mixed 3.3V/5V environment. The 74LVC16240A is a 16-bit inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high impedance OFF-state. The 74LVC16240A is identical to the 74LVC16244A but has inverting outputs. GND 10 2Y2 11 2Y3 12 3Y0 13 3Y1 14 GND 15 3Y2 16 3Y3 17 VCC 18 4Y0 19 4Y1 20 GND 21 4Y2 22 4Y3 23 4OE 24 SW00041 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 _C; tr = tf v 2.5 ns PARAMETER SYMBOL tPHL/tPLH CI CPD Propagation delay 1An to 1Yn; 2An to 2Yn Input capacitance Power dissipation capacitance per buffer VCC = 3.3V CONDITIONS CL = 50pF VCC = 3.3V TYPICAL 2.7 5.0 25 UNIT ns pF pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in mW): PD = CPD x VCC2 x fi + S (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; S (CL x VCC2 x fo) = sum of outputs. ORDERING INFORMATION PACKAGES 48-Pin Plastic SSOP Type III 48-Pin Plastic TSSOP Type II TEMPERATURE RANGE -40C to +85C -40C to +85C OUTSIDE NORTH AMERICA 74LVC16240A DL 74LVC16240A DGG NORTH AMERICA VC16240A DL VC16240A DGG DWG NUMBER SOT370-1 SOT362-1 1997 Jul 29 2 853-2007 18218 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A PIN DESCRIPTION PIN NUMBER 1 2, 3, 5, 6 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 8, 9, 11, 12 13, 14, 16, 17 19, 20, 22, 23 24 25 30, 29, 27, 26 36, 35, 33, 32 41, 40, 38, 37 47, 46, 44, 43 48 SYMBOL 1OE 1Y0 to 1Y3 GND VCC 2Y0 to 2Y3 3Y0 to 3Y3 4Y0 to 4Y3 4OE 3OE 4A0 to 4A3 3A0 to 3A3 2A0 to 2A3 1A0 to 1A3 2OE NAME AND FUNCTION Output enable input (active LOW) Data outputs Ground (0V) Positive supply voltage Data outputs Data outputs Data outputs Output enable input (active LOW) Output enable input (active LOW) Data inputs Data inputs Data inputs Data inputs Output enable input (active LOW) FUNCTION TABLE INPUTS nOE L L H H = HIGH voltage level L = LOW voltage level X = don't care Z = high impedance OFF-state nAn L H X OUTPUT nYn H L Z LOGIC SYMBOL (IEEE/IEC) 1OE 2OE 3OE 4OE 1A0 1A1 1A2 1A3 2A0 2A1 1 48 25 24 47 46 44 43 41 1 40 38 37 36 35 33 32 30 29 27 26 1 4 1 3 2 EN1 EN2 EN3 EN4 1 1 2 3 5 6 8 9 11 12 13 14 16 17 19 20 22 23 1Y0 1Y1 1Y2 1Y3 2Y0 2Y1 2Y2 2Y3 3Y0 3Y1 3Y2 3Y3 4Y0 4Y1 4Y2 4Y3 LOGIC SYMBOL 1A0 47 2 1Y0 3A0 36 13 3Y0 2A2 2A3 3A0 3A1 1A1 46 3 1Y1 3A1 35 14 3Y1 3A2 3A3 1A2 44 5 1Y2 3A2 33 16 3Y2 4A0 4A1 1A3 43 6 1Y3 3A3 32 17 3Y3 4A2 4A3 1OE 1 3OE 25 SW00059 2A0 41 8 2Y0 4A0 30 19 4Y0 2A1 40 9 2Y1 4A1 29 20 4Y1 2A2 38 11 2Y2 4A2 27 22 4Y2 2A3 37 12 2Y3 4A3 26 23 4Y3 2OE 48 4OE 24 SW00042 1997 Jul 29 3 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER DC supply voltage (for max. speed performance) DC supply voltage (for low-voltage applications) DC Input voltage range DC output voltage range; output HIGH or LOW state DC output voltage range; output 3-State Operating ambient temperature range in free air Input rise and fall times See DC and AC characteristics for individual device VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V CONDITIONS MIN. MIN VCC VCC VI VO VO Tamb tr, tf 2.7 1.2 0 0 0 -40 0 0 MAX. MAX 3.6 3.6 5.5 VCC 5.5 +85 20 10 V V V V V C ns/V UNIT ABSOLUTE MAXIMUM RATINGS1 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) LIMITS SYMBOL VCC IIK VI IOK VO VO IO IGND, ICC Tstg Ptot PARAMETER DC supply voltage DC input diode current DC input voltage DC output diode current DC output voltage; output HIGH or LOW state DC output voltage; output 3-State DC output source or sink current DC VCC or GND current Storage temperature range Power dissipation per package - SO package - SSOP and TSSOP package Above +70C derate linearly 8mW/K Above +60C derate linearly 5.5mW/K VI < 0 Note 2 VO > VCC or VO < 0 Note 2 Note 2 VO = 0 to VCC CONDITIONS MIN -0.5 - -0.5 - -0.5 -0.5 - - -65 MAX +6.5 -50 +6.5 "50 VCC + 0.5 6.5 "50 "100 +150 500 500 V mA V mA V V mA mA C mW UNIT NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1997 Jul 29 4 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40C to +85C MIN VIH HIGH level Input voltage VCC = 1.2V VCC = 2.7 to 3.6V LOW level Input voltage VCC = 1.2V VCC = 2.7 to 3.6V VCC = 2.7V; VI = VIH or VIL; IO = -12mA VO OH HIGH level output voltage VCC = 3.0V; VI = VIH or VIL; IO = -100A VCC = 3.0V; VI = VIH or VIL; IO = -18mA VCC = 3.0V; VI = VIH or VIL; IO = -24mA VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOL LOW level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100A VCC = 3.0V; VI = VIH or VIL; IO = 24mA II IOZ Ioff ICC ICC Input leakage current 3-State output OFF-state current Power off leakage supply Quiescent supply current Additional quiescent supply current per input pin VCC = 3 6V; VI = 5 5V or GND 3.6V; 5.5V VCC = 3.6V; VI = VIH or VIL; VO = 5.5V or GND VCC = 0.0V; VI or VO = 5.5V VCC = 3.6V; VI = VCC or GND; IO = 0 VCC = 2.7V to 3.6V; VI = VCC -0.6V; IO = 0 "0 1 "0.1 0.1 0.1 0.1 5 GND VCC*0.5 VCC*0.2 VCC*0.6 VCC*0.8 0.40 0.20 0.55 "5 "5 "10 20 500 A A A A A V VCC V VCC 2.0 GND V 0.8 TYP1 MAX V UNIT VIL NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25C. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500; Tamb = -40C to +85C. LIMITS SYMBOL PARAMETER Propagation delay 1An to 1Yn; 2An to 2Yn 3-State output enable time 1OE to 1Yn; 2OE to 2Yn 3-State output disable time 1OE to 1Yn; 2OE to 2Yn WAVEFORM VCC = 3.3V 0.3V MIN tPHL tPLH tPZH tPZL tPHZ tPLZ 1, 3 1.5 TYP1 2.8 MAX 4.7 VCC = 2.7V MIN 1.5 MAX 5.7 VCC = 1.2V TYP 12 ns UNIT 2, 3 1.5 3.5 5.4 1.5 6.4 18 ns 2, 3 1.5 3.9 5.1 1.5 6.1 11 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25C. 1997 Jul 29 5 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A AC WAVEFORMS VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V. VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V; VX = VOL + 0.1 VCC at VCC t 2.7V VY = VOH -0.3V at VCC w 2.7V; VY = VOH - 0.1 VCC at VCC t 2.7V TEST CIRCUIT VCC S1 2 Test Circuit for 3-State Outputs SWITCH POSITION TEST tPLH/tPHL tPLZ/tPZL SW00045 SWITCH Open 2 VIN VCC 2.7V tPHZ/tPZH Waveform 1. Input (An) to output (Yn) propagation delay times DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. SW00047 GND VI OE INPUT VM Waveform 3. Load circuitry for switching times tPLZ tPZL VCC Qn OUTPUT LOW-to-OFF OFF-to-LOW VOL tPHZ VOH Qn OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs disabled outputs enabled VY VM tPZH VM VX SW00046 Waveform 2. 3-State enable and disable times 1997 Jul 29 6 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1 1997 Jul 29 7 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT362-1 1997 Jul 29 8 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A NOTES 1997 Jul 29 9 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A DEFINITIONS Data Sheet Identification Objective Specification Product Status Formative or in Design Definition This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Preliminary Specification Preproduction Product Product Specification Full Production Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 (c) Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. print code Document order number: Date of release: 05-96 9397-750-04526 Philips Semiconductors yyyy mmm dd 10 |
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