| PART |
Description |
Maker |
| ACTS74HMSR ACTS74MS 5962F9671301VCC 5962F9671301VX |
ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
Radiation Hardened Dual D Flip Flop with Set and Reset
D-Flip Flop, Dual, with Set and Reset, TTL Inputs, Rad-Hard, Advanced Logic, CMOS
|
INTERSIL[Intersil Corporation]
|
| 74HC_HCT74 |
Dual D-type flip-flop with set and
|
Philips
|
| MC74VHC74-D MC74VHC74MEL MC74VHC74DR2 MC74VHC74DTR |
Dual D-Type Flip-Flop with Set and Reset
|
ON Semiconductor
|
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| MC74LVX74-D |
Dual D-Type Flip-Flop with Set and Clear With 5V Tolerant Inputs
|
ON Semiconductor
|
| MC10H106 MC100EL29DWR2 MC10H117 MC10H117FN MC100EP |
Triple 4-3-3-Input NOR Gate
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing
5V ECL 2-Input XOR/XNOR
4-Wide OR-AND/OR-ANDbar Gate
5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL ÷2 Divider
5V ECL Differential Data and Clock D Flip-Flop
|
ON Semiconductor
|
| IZ74LV74 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
Integral Corp.
|
| 74ALVC74PW 74ALVC74 74ALVC74BQ 74ALVC74D |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
PHILIPS[Philips Semiconductors]
|
| 74LVC74A 74LVC74AD 74LVC74ADB 74LVC74APW 74LVC74AP |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
Philips Semiconductors
NXP Semiconductors
|
| 74HC74N |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
| 5962F9863201VCC 5962F9863201V9A 5962F9863201VXC AC |
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16
AC SERIES, DUAL POSITIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual J-K Flip-Flop with Set and Reset 辐射硬化的设置和复位JK触发
|
Intersil Corporation
Intersil, Corp.
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
