PART |
Description |
Maker |
74AUP2G80GD125 74AUP2G80GM125 |
Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT996-2 (XSON8U); Container: Reel Pack, Reverse, Reverse AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8 Low-power dual D-type flip-flop; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors N.V.
|
74AUP2G79 |
Low-power dual D-type flip-flop
|
NXP Semiconductors
|
74LVX112M 74LVX112MTC 74LVX112 74LVX112SJX |
J-K-Type Flip-Flop Low Voltage Dual J-K Flip-Flops with Preset and Clear From old datasheet system
|
FAIRCHILD[Fairchild Semiconductor]
|
74HCT107D-T 74HC107D-T |
J-K-Type Flip-Flop JK -型触发器 SC70/µDFN, Single/Dual Low-Voltage, Low-Power µP Reset Circuits
|
NXP Semiconductors N.V.
|
MC145572EVK MC74LVQ74SD MC74LVQ74 MC74LVQ74D MC74L |
LOW-VOLTAGE CMOS DUAL D-TYPE FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
|
74VHCT74A 74VHCT74AM 74VHCT74ASJ 74VHCT74 74VHCT74 |
Octal D-type Edge-Triggered Flip-Flops With 3-State Outputs 20-SOIC -40 to 85 AHCT/VHCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14 Dual D-Type Flip-Flop with Preset and Clear AHCT/VHCT/VT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
Fairchild Semiconductor, Corp. FAIRCHILD[Fairchild Semiconductor]
|
74LVQ74-01 |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop
|
Fairchild Semiconductor
|
74ALS74A 74ALS74AD 74ALS74ADB 74ALS74AN 74ALS74 |
Dual D-type flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
PHILIPS[Philips Semiconductors] NXP Semiconductors N.V.
|
MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator 5V ECL Low Impedance Driver Dual Type D Master-Slave Flip-Flop ECL/TTL Clock Driver 3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock 3.3V / 5V ECL ÷4 Divider Quad 2-Input NOR Gate 3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset 3.3V / 5V Hex Differential Line Receiver / Driver 3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
74FR1074 74FR1074SCX |
FR/FASTR SERIES, DUAL NEGATIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14 0.150 INCH, MS-012, SOIC-14 From old datasheet system Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
|
74LCX74 4979 |
LOW VOLTAGE CMOS DUAL D-TYPE FLIP FLOP WITH 5V TOLERANT INPUTS From old datasheet system
|
STMicro
|