| PART |
Description |
Maker |
| M29W160EB70N1 M29W160EB70N1T M29W160EB70N6 M29W160 |
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 56-BGA MICROSTAR JUNIOR -40 to 85 16兆位（含2Mb x8兆x16插槽，引导块3V电源快闪记忆
CAP 3300UF 6.3V ELECT FC RADIAL 16兆位（含2Mb x8兆x16插槽，引导块V电源快闪记忆
16 Mbit (2Mb x8 or 1Mb x16 / Boot Block) 3V Supply Flash Memory
16 MBIT (2MB X8 OR 1MB X16, BOOT BLOCK) 3V SUPPLY FLASH MEMORY
70ns; V(in/out): -0.6 to 0.6V; 16Mbit (2Mb x 8 or 1Mb x 16, boot block) 3V supply flash memory
|
STMicroelectronics N.V.
ST Microelectronics
SGS Thomson Microelectronics
|
| LHF16KA9 LH28F160S5T-L70 LH28F160S5T-L70A |
Flash Memory 16M (2MB × 8/1MB × 16)
|
Sharp Electrionic Components
|
| LH28F160S3T-L10 LH28F160S3T-L10A LHF16KA6 |
Flash Memory 16M (2MB x 8/1MB x 16)
Flash Memory 16M (2MB bb 8/1MB bb 16)
Flash Memory 16M (2MB 8/1MB 16)
Flash Memory 16M (2MB 】 8/1MB 】 16)
|
SHARP[Sharp Electrionic Components]
|
| LH28F160S3NS-L10 LHF16KA1 |
Flash Memory 16M (2MB 】 8/1MB 】 16)
Flash Memory 16M (2MB 8/1MB 16)
|
SHARP[Sharp Electrionic Components]
|
| LH28F160S3HT-L10A LHF16KA7 |
Flash Memory 16M (2MB 】 8/1MB 】 16)
Flash Memory 16M (2MB 8/1MB 16)
|
SHARP[Sharp Electrionic Components]
|
| LH28F160S5HT-L70 LHF16KA3 |
Flash Memory 16M (2MB 8/1MB 16)
Flash Memory 16M (2MB × 8/1MB × 16)
|
Sharp Corporation
Sharp Electrionic Components
|
| M29W160EB |
16 MBIT (2MB X8 OR 1MB X16, BOOT BLOCK) 3V SUPPLY FLASH MEMORY
|
ST Microelectronics
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
| GS8324Z18B-225I GS8324Z18B-250I GS8324Z18B-133I GS |
225MHz 6.5ns 2M x 18 36Mb sync NBT SRAM
250MHz 6ns 2M x 18 36Mb sync NBT SRAM
133MHz 11ns 2M x 18 36Mb sync NBT SRAM
166MHz 8.5ns 2M x 18 36Mb sync NBT SRAM
150MHz 10ns 2M x 18 36Mb sync NBT SRAM
200MHz 7.5ns 2M x 18 36Mb sync NBT SRAM
166MHz 7ns 2M x 18 36Mb sync NBT SRAM
133MHz 11ns 1M x 36 36Mb sync NBT SRAM
150MHz 10ns 1M x 36 36Mb sync NBT SRAM
166MHz 8.5ns 1M x 36 36Mb sync NBT SRAM
200MHz 7.5ns 1M x 36 36Mb sync NBT SRAM
225MHz 6.5ns 1M x 36 36Mb sync NBT SRAM
250MHz 6ns 1M x 36 36Mb sync NBT SRAM
|
GSI Technology
|
| GS8321ZV18 GS8321ZV32 GS8321ZV36E-250 GS8321ZV36E- |
36Mb NBT SRAMs
36Mb Pipelined and Flow Through Synchronous NBT SRAM
|
GSI[GSI Technology]
ETC
|
| MT54W4MH9B MT54W4MH8B MT54W1MH36B-5 MT54W1MH36B-7. |
36Mb QDRII SRAM 2-WORD BURST
36Mb QDR⑩II SRAM 2-WORD BURST ⑩分6MB四年防务审查II SRAM字爆
36Mb QDR?┥I SRAM 2-WORD BURST
|
Micron Technology, Inc.
|
| GS832218B-133 GS832218B-133I GS832218B-150 GS83221 |
64K 3.3 VOLT SERIAL CONFIGURATION PROM 200万1800万36，为512k × 72分配36MB的S /双氰胺同步突发静态存储器
GIGABASE 350 CAT5E PATCH 1 FT, SNAGLESS, WHITE 200万1800万36，为512k × 72分配36MB的S /双氰胺同步突发静态存储器
2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs 200万18100万36，为512k × 72分配36MB的S /双氰胺同步突发静态存储器
2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs 200万1800万36，为512k × 72分配36MB的S /双氰胺同步突发静态存储器
2M x 18, 1M x 36, 512K x 72 36Mb S/DCD Sync Burst SRAMs 200万1800万36，为512k × 72分配36MBS /双氰胺同步突发静态存储器
DIODE, ZENER, 4.3V, 0.5W, 5%, -65-175C, DO-35
(GS832218 / GS832236 / GS832272) S/DCD Sync Burst SRAMs
|
ETC
Electronic Theatre Controls, Inc.
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