PART |
Description |
Maker |
M48T129V-70PM1 M48T129V-85PM1 M48T129Y-70PM1 M48T1 |
3.3V-5V 1Mb (128K x 8) Timekeeper SRAM(1Mb TIMERKEEPEER SRAM) 5.0 or 3.3V, 1 Mbit (128 Kbit x 8) TIMEKEEPER SRAM
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意法半导 STMicroelectronics
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MT58L32L32D MT58L32L36D MT58L64L18D |
32K x 36,3.3V I/O, Pipelined, DCD SyncBurst SRAM(1Mb,3.3V输入/输出,流水线式,双循环取消选择,同步脉冲静态存储器) 64K x 18, 3.3V I/O, Pipelined, DCD SyncBurst SRAM(1Mb,3.3V输入/输出,流水线式,双循环取消选择,同步脉冲静态存储器) 32K x 32,3.3V I/O, Pipelined, DCD SyncBurst SRAM(1Mb,3.3V输入/输出,流水线式,双循环取消选择,同步脉冲静态存储器) 32KX82,3.3 O的流水线,双氰胺SyncBurst的SRAM兆,3.3V的输输出,流水线式,双循环取消选择,同步脉冲静态存储器
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Micron Technology, Inc. Micrel Semiconductor, Inc.
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GS71108AGP-10 GS71108AGP-10I GS71108AGP-12 GS71108 |
128K x 8 1Mb Asynchronous SRAM
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List of Unclassifed Man... List of Unclassifed Manufacturers ETC
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N01L1618N1AT2-70I N01L1618N1A N01L1618N1AB N01L161 |
1Mb Ultra-Low Power Asynchronous CMOS SRAM
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NANOAMP[NanoAmp Solutions, Inc.]
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N01L6183A |
1Mb Ultra-Low Power Asynchronous CMOS SRAM
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ON Semiconductor
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CXK77K36R320GB CXK77K36R320GB-3 CXK77K36R320GB-33 |
32Mb LW R-R HSTL High Speed Synchronous SRAM (1Mb x 36)
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Sony Corporation
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M36W108AB M36W108AB100ZM1T M36W108AB100ZM5T M36W10 |
8 MBIT (1MB X8, BOOT BLOCK) FLASH MEMORY AND 1 MBIT (128KB X8) SRAM LOW VOLTAGE MULTI-MEMORY PRODUCT 8 Mbit (1Mb x8, Boot Block) Flash Memory and 1 Mbit (128Kb x8) SRAM Low Voltage Memory 8 Mbit 1Mb x8, Boot Block Flash Memory and 1 Mbit 128Kb x8 SRAM Low Voltage Multi-Memory Product From old datasheet system
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ST Microelectronics SGS Thomson Microelectronics STMICROELECTRONICS[STMicroelectronics]
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N01L63W3A |
1Mb Ultra-Low Power Asynchronous CMOS SRAM 64K x 16 bit
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ON Semiconductor
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M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V 18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V 72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机 Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机 72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
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Renesas Electronics Corporation. Renesas Electronics, Corp.
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N01L0818L1A |
1Mb Ultra-Low Power Asynchronous Medical CMOS SRAM 128Kx8 bit
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NanoAmp Solutions
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HY62VT08081E-DGC HY62VT08081E-DGE HY62VT08081E-DGI |
Low Power Slow SRAM - 256Kb SWITCH, REED SPST-NO 10W SMD QSW-REED,10MM,10W,SMD 9 POS FR-4 SIP SOCKET x8|3V|70/85/100|Low Power Slow SRAM - 256K x8|3.3V|70/85/100|Low Power Slow SRAM - 256K 32Kx8bit CMOS SRAM 32Kx8bit CMOS SRAM x8 SRAM x8的SRAM x8 SRAM 32K X 8 STANDARD SRAM, 100 ns, PDSO28 x8 SRAM 32K X 8 STANDARD SRAM, 70 ns, PDSO28 x8 SRAM 32K X 8 STANDARD SRAM, 100 ns, PDIP28
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HYNIX[Hynix Semiconductor] Hynix Semiconductor Inc. Hynix Semiconductor, Inc. Analog Devices, Inc. Panasonic Industrial Solutions
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M36W216TI-ZAT M36W216BIZA M36W216TIZA M36W216TI70Z |
16 Mbit 1Mb x16, Boot Block Flash Memory and 2 Mbit 128Kb x16 SRAM, Multiple Memory Product 16兆x16插槽,开机区块快闪记忆体兆位128KB的x16的SRAM,多个存储产 16 Mbit 1Mb x16, Boot Block Flash Memory and 2 Mbit 128Kb x16 SRAM, Multiple Memory Product 16兆x16插槽,开机区块快闪记忆体2兆位128KB的x16的SRAM,多个存储产 PV76L14-18P
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http:// STMicroelectronics N.V. 意法半导
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