| PART |
Description |
Maker |
| MC10H106 MC100EL29DWR2 MC10H117 MC10H117FN MC100EP |
Triple 4-3-3-Input NOR Gate
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing
5V ECL 2-Input XOR/XNOR
4-Wide OR-AND/OR-ANDbar Gate
5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL ÷2 Divider
5V ECL Differential Data and Clock D Flip-Flop
|
ON Semiconductor
|
| LTC2410 |
24-Bit No Latency Delta SigmaADC with Differential Input and Differential Reference
|
Linear Technology
|
| ICS9DB202 ICS9DB202CF ICS9DB202CFLF ICS9DB202CFLFT |
From old datasheet system
Two 0.7V current mode differential HCSL output pairs, 1 differential clock input
|
http://
ICST[Integrated Circuit Systems]
|
| EVAL-CONTROLBRD2 EVAL-AD7450CB AD7450ARM AD7450BR |
Differential Input, 1MSPS, 12-Bit ADC in SO-8 and S0-8
Differential Input, 1MSPS, 12-Bit ADC in レSO-8 and S0-8
Differential Input/ 1MSPS/ 12-Bit ADC in SO-8 and S0-8
Differential Input, 1MSPS, 12-Bit ADC in μSO-8 and S0-8
|
Analog Devices, Inc.
|
| LTC2323-12-15 |
Dual, 12-Bit Sign, 5Msps Differential Input ADC with Wide Input Common Mode Range
|
Linear Technology
|
| LTC2323CUFD-12PBF |
Dual, 12-Bit Sign, 5Msps Differential Input ADC with Wide Input Common Mode Range
|
Linear Technology
|
| LTC2323-14-15 |
Dual, 14-Bit Sign, 5Msps Differential Input ADC with Wide Input Common Mode Range
|
Linear Technology
|
| LTC2335HLX-16PBF |
16-Bit, 1Msps 8-Channel Differential ±10.24V Input SoftSpan ADC with Wide Input Common Mode Range
|
Linear Technology
|
| PI6C4911510FAEIE PI6C4911510ZHIE PI6C4911510FAIE P |
2.5V/3.3V 1.5GHz Low Skew 1-to-10 Differential to LVPECL Fanout Buffer with 2 to 1 Differential Clock Input Mux
|
Pericom Semiconductor C...
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| K4R441869A-NM K4R441869A-MCK8 K4R441869A-NCK7 |
8M X 18 DIRECT RAMBUS DRAM, 45 ns, PBGA62
K4R271669A-N(M):Direct RDRAMData Sheet
|
Samsung Electronic
|
| NB6L11 NB6L11DTR2 NB6L11D NB6L11DR2 NB6L11DT |
2.5V / 3.3V MULTILEVEL INPUT TO DIFFERENTIAL LVPECL/LVNECL 1:2 CLOCK OR DATA FANOUT BUFFER / TRANSLATOR 6L SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
6GHz 2.5V/3.3V Multilevel Input to Differential LVNECL/LVPECL 1:2 Clock or Data Fanout Buffer/Transl
From old datasheet system
|
ONSEMI[ON Semiconductor]
|
