| PART |
Description |
Maker |
| SD7765-3-3 |
TRI-LOC, SMPTE 304, PLUG
|
Winchester Electronics Corporation
|
| CY7B9334 CY7B9234 7B9234 |
SMPTE HOTLink Transmitter/Receiver
From old datasheet system
|
Cypress
|
| CY7C9235A CY7C9235A-270JC |
SMPTE-259M/DVB-ASI Scrambler/Controller
|
http://
Cypress Semiconductor
|
| 78-1012U VNFPS01-900-34 78-0301U 78-7003U 78-4005U |
TRI-LOC, SMPTE 304, PLUG PRE-POLISHED
|
Winchester Electronics Corporation
Winchester Electronics ...
|
| ICS2008B ICS2008BY-10 ICS200 ICS2008BEB ICS2008BEP |
From old datasheet system
SMPTE Time Code Receiver/Generator
|
ICST[Integrated Circuit Systems]
|
| GS2960A |
Ancillary data extraction
3Gb/s, HD, SD SDI Receiver Complete with SMPTE Video Processing
|
Gennum Corporation
Semtech Corporation
|
| LMH0001SQ LMH0001 |
SMPTE 259M / 344M Serial Digital Cable Driver
|
Intersil Corporation
|
| CLC031A CLC031AVEC |
SMPTE 292M/259M Digital Video Deserializer / Descrambler with Video and Ancillary Data FIFOs 的SMPTE 292M/259M数字视频解串解扰器的视频和辅助数据FIFO
|
Motorola, Inc.
Motorola Mobility Holdings, Inc.
|
| UPD424280LLE-A80 UPD424280LLE-A70 UPD424280AG5M-80 |
x18 Fast Page Mode DRAM
Quad PLL Clock Generator with Serial Interface (I2C)
Low-Cost 3.3V Spread Aware™ Zero Delay Buffer
MediaClock™ MPEG Clock Generator with VCXO
MediaClock™ PDP Clock Generator
Field and Factory-Programmable Spread Spectrum Clock Generator for EMI Reduction
HOTLink II™ SMPTE Receiver Training Clock
3.3V Zero Delay Buffer x18快速页面模式的DRAM
|
|
| ELJND102KF ELJND102DF ELJNA221JF ELJFC220DF ELJFC2 |
If you are looking for a Chinese version of this datasheet, more; Vcc (V): 3 V to 5.25 V; Package: QFN;
If you are looking for a Chinese version of this datasheet, more; Vcc (V): 2.4 V to 5.25 V; Package: TQFP;
TAXI(TM) Compatible HOTLink(R) Transceiver; Features: 8-bit 4B/5B or 10-bit 5B/6B,BIST; Frequency Range: 50 to 200 Mbps; Standard: TAXIchip;
EZ-USB HX2LP(TM) Low-Power USB 2.0 Hub Controller Family; Development Kit: CY4606; Hub Ports: 4; USB Application: High Speed Hub;
Independent Clock Quad HOTLink II(TM) Reclocking Deserializer; Features: Quad Channel Deserializer; Package: BGA; Pins/Ball: 256; Standard
Independent Clock HOTLink II(TM) Serializer and Reclocking Deserializer; Features: Single Channel SERDES; Package: BGA; Pins/Ball: 256
EZ-USB AT2LP(TM) USB 2.0 to ATA/ATAPI Bridge; # Endpoints: 7; Core: N/A; Data Transfers: Bulk, Interrupt, Isochronous; Development Kit: CY4615B
Independent Clock HOTLink II(TM) Dual Serializer and Dual Reclocking Deserializer; Features: Dual Channel SERDES; Package: BGA; Pins/Ball: 256; Standard: SMPTE|DVB-ASI
Independent Clock Quad HOTLink II™ Transceiver; Features: Independent Clocking, 8B/10B, Redundancy, BIST, JTAG; Frequency Range: 0.2 to 1.5 Gbps; Standard: Ethernet, Fibre Channel, ESCON, DVB-ASI;
Single-channel HOTLink II(TM) Transceiver; Features: 8B/10B, Redundancy, BIST, JTAG; Frequency Range: 0.2 to 1.5 Gbps; Standard: Ethernet, Fibre Channel, ESCON, DVB-ASI;
Dual-channel HOTLink II(TM) Transceiver; Features: Channel Bonding, 8B/10B, Redundancy, BIST, JTAG; Frequency Range: 0.2 to 1.5 Gbps; Standard: Ethernet, Fibre Channel, ESCON, DVB-ASI;
EZ-Host(TM) Programmable Embedded USB Host and Peripheral Controller with Automotive AEC Grade Support; Memory Architecture: ROM/RAM; Memory Size: 16 KB; Package: TQFP; # Endpoints: 8
EZ-USB SX2(TM) High Speed USB Interface Device; # Endpoints: 7; Core: N/A; Data Transfers: Bulk, Interrupt, Isochronous; Development Kit: CY3683
STAR-250/CYIS1SM0250AA; Application: Satellite Optical Altitude, Comm Sensors, Spacecraft Visual Monitors, Nuclear; Features: Rolling Shutter, Windowing, On-Chip FPN Correction, Double Slope; Frame Rate: 29 fps; Optical Format: 1 inch
Programmable System on a Chip; Voltage: 4.75V - 5.25V; GPIO: 24; Analog Blocks: 12; Digital Blocks: 16; Flash: 32KB; RAM: 2KB; Temp: E; Comm: I2C, SPI, UART; Package: 28 SSOP
If you are looking for a Chinese version of this datasheet, more; Vcc (V): 2.4 V to 5.25 V; Package: TQFP; 片式电感
If you are looking for a Chinese version of this datasheet, more; Vcc (V): 3 V to 5.25 V; Package: QFN; 片式电感
Chip inductors 片式电感
64/256/512/1K/2K/4K x18 Low-Voltage Synchronous FIFOs; Density: 64 Kb; Organization: 4Kb x 18; VCC(V): 3.0 to 3.6 V; Speed: 40 MHz 片式电感
Independent Clock Quad HOTLink II(TM) Reclocking Deserializer; Features: Quad Channel Deserializer; Package: BGA; Pins/Ball: 256; Standard: SMPTE|DVB-ASI 片式电感
EZ-USB AT2LP(TM) USB 2.0 to ATA/ATAPI Bridge; # Endpoints: 7; Core: N/A; Data Transfers: Bulk, Interrupt, Isochronous; Development Kit: CY4615B 片式电感
enCoRe(TM) USB Combination Low-Speed USB and PS/2 Peripheral Controller; # Endpoints: 3; #of I/O: 10; Core: M8B (8-bit RISC); Development Kit: CY3654, CY3654-P05 1 ELEMENT, 22 uH, FERRITE-CORE, GENERAL PURPOSE INDUCTOR, SMD
Chip inductors 1 ELEMENT, 0.22 uH, NON-MAGNETIC-CORE, GENERAL PURPOSE INDUCTOR, SMD
1.3 MPxl Rolling Shutter CMOS Image Sensor; Application: Machine Vision, Instrumentation, Microscopy; Features: Rolling Shutter, Windowing, On-Chip FPN Correction, Double Slope; Frame Rate: 7 fps; Optical Format: 2/3 inch
|
Panasonic Corporation
Panasonic, Corp.
|
|
