| PART |
Description |
Maker |
| K4C89323AF-GCFB K4C89323AF-TCF6 K4C89323AF-TCF5 K4 |
2,097,152-WORDS x 4 BANKS x 36-BITS DOUBLE DATA RATE Network-DRAM
|
SAMSUNG SEMICONDUCTOR CO. LTD.
|
| CS433408 CS4338-KSZ CS4338-DSZ CS4339-KSZ |
8-Pin, 24-Bit, 96 kHz Stereo D/A Converter
D/A Converter (D-A) IC; Resolution (Bits):24; Update Rate:96kSPS; No. of DACs:2; Data Interface:Serial; Package/Case:8-SOIC; Interface Type:Serial; Leaded Process Compatible:No; No. of Bits:18; Operating Temp. Max:70 C RoHS Compliant: Yes
|
CIRRUS LOGIC INC
|
| PS2802-1 PS2802-1-F3 PS2802-1-F4 PS2802-4 PS2802-4 |
A/D Converter (A-D) IC; Resolution (Bits):24; ADC Sample Rate:192kSPS; Input Channels Per ADC:2; Input Channel Type:Single Ended Inputs; Data Interface:Serial; Package/Case:24-TSSOP; Interface Type:Serial
A/D Converter (A-D) IC; Resolution (Bits):24; Sample Rate:192kSPS; Input Channels Per ADC:2; Input Channel Type:Single Ended; Data Interface:Serial; Package/Case:24-SOIC; IC Generic Number:5351; Interface Type:Serial RoHS Compliant: Yes
HIGH ISOLATION VOLTAGE DARLINGTON TRANSISTOR TYPE SOP PHOTOCOUPLER
|
NEC Corp.
NEC[NEC]
|
| 106414-1205 |
QSFP to MPO Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate, 2dB Loss Budget, Cable Length 5.0m
|
Molex Electronics Ltd.
|
| EVAL-AD7400EB-U1 |
Isolated Sigma-Delta Modulator (10 MHz Data Rate)
|
Analog Devices
|
| STEVAL-IKR002V1 |
SPIRIT1 - Low Data Rate Transceiver - 169 MHz - FULL KIT
|
ST Microelectronics
|
| STEVAL-IKR002V2D |
SPIRIT1 - Low Data Rate Transceiver - 315 MHz - DAUGHTER BOARD
|
ST Microelectronics
|
| STEVAL-IDS001V3 |
SPIRIT1 - Low Data Rate Transceiver - 433 MHz - USB dongle
|
ST Microelectronics
|
| STEVAL-IDS001V4 |
SPIRIT1 - Low Data Rate Transceiver - 868 MHz - USB dongle
|
ST Microelectronics
|
| 1064111050 |
QSFP to QSFP Fourteen Data Rate PSM4 Active Optical Cable, 56 Gbps Data Rate
|
Molex Electronics Ltd.
|
| M13S2561616A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| W9725G6JB25I |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
