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GS8161E32D-166 - 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×18512k×32512k×36 18M位同步突发静态存储器 20-Bit SSTL_3 Interface Buffer With 3-State Outputs 64-TSSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 25-Bit Configurable Registered Buffer With Address-Parity Test 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×1812k×3212k×36 18M位同步突发静态存储器 Quad 2-input Exclusive-OR gates 14-PDIP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 20-Bit SSTL_3 Interface Universal Bus Driver With 3-State Outputs 64-TSSOP 0 to 70 Quad 2-input Exclusive-OR gates 14-SOIC 0 to 70 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70

GS8161E32D-166_338258.PDF Datasheet
 
Part No. GS8161E32D-166 GS8161E32D-166I GS8161E3T-200 GS8161E32D-133I GS8161E32D-225I GS8161E32D-150I GS8161E32D-250 GS8161E18D-200 GS8161E36D-225I GS8161E18D-133 GS8161E18D-133I GS8161E18T-133 GS8161E18D-225 GS8161E18D-225I GS8161E36T-133I GS8161E32D-200 GS8161E36T-166 GS8161E36T-225I GS8161E36T-166I GS8161E18T-150 GS8161E36D-166 GS8161E18T-166 GS8161E18T-133I GS8161E18D-150I GS8161E36T-250 GS8161E36T-150 GS8161E36T-150I
Description 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×18512k×32512k×36 18M位同步突发静态存储器
20-Bit SSTL_3 Interface Buffer With 3-State Outputs 64-TSSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
25-Bit Configurable Registered Buffer With Address-Parity Test 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×1812k×3212k×36 18M位同步突发静态存储器
Quad 2-input Exclusive-OR gates 14-PDIP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器
20-Bit SSTL_3 Interface Universal Bus Driver With 3-State Outputs 64-TSSOP 0 to 70
Quad 2-input Exclusive-OR gates 14-SOIC 0 to 70
13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
File Size 600.92K  /  36 Page  

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Electronic Theatre Controls, Inc.

Homepage http://www.gsitechnology.com/
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 Full text search : 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×18512k×32512k×36 18M位同步突发静态存储器 20-Bit SSTL_3 Interface Buffer With 3-State Outputs 64-TSSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 25-Bit Configurable Registered Buffer With Address-Parity Test 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×1812k×3212k×36 18M位同步突发静态存储器 Quad 2-input Exclusive-OR gates 14-PDIP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 20-Bit SSTL_3 Interface Universal Bus Driver With 3-State Outputs 64-TSSOP 0 to 70 Quad 2-input Exclusive-OR gates 14-SOIC 0 to 70 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70
 Product Description search : 14-Bit Registered Buffer With SSTL_2 Inputs and Outputs 48-TVSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×18512k×32512k×36 18M位同步突发静态存储器 20-Bit SSTL_3 Interface Buffer With 3-State Outputs 64-TSSOP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 25-Bit Configurable Registered Buffer With Address-Parity Test 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 1M x 18, 512K x 32, 512K x 36 18Mb Sync Burst SRAMs 1M×1812k×3212k×36 18M位同步突发静态存储器 Quad 2-input Exclusive-OR gates 14-PDIP 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 25-Bit Configurable Registered Buffer with SSTL_18 Inputs and Outputs 96-LFBGA 0 to 70 100万1812k × 32的，12k × 36 35.7同步突发静态存储器 20-Bit SSTL_3 Interface Universal Bus Driver With 3-State Outputs 64-TSSOP 0 to 70 Quad 2-input Exclusive-OR gates 14-SOIC 0 to 70 13-Bit to 26-Bit Registered Buffer with SSTL_2 Inputs and Outputs 56-VQFN 0 to 70

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