| PART |
Description |
Maker |
| 74ALS74A 74ALS74AD 74ALS74ADB 74ALS74AN 74ALS74 |
Dual D-type flip-flop with set and reset ALS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors N.V.
|
| MC100EP01 MC10EP445 MC10H172FNR2 MC100EL29 MC100H6 |
3.3V / 5V ECL 4-Input OR/NOR
3.3V / 5VECL 8-Bit Serial/Parallel Converter
Dual Binary 1-4-Decoder (High)
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
9-Bit TTL-ECL Translator
Quad TTL-ECL Translator
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL 8-Bit Synchronous Binary Up Counter
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
5V ECL Voltage Controlled Oscillator
3.3V ECL D-Type Flip-Flop with Set and Reset
Binary to 1-8 Decoder (Low)
Differential -5V ECL To TTL Translator
-3.3V / -5V Triple ECL Input to PECL Output Translator
5V ECL Dual Differential 2:1 Multiplexer
Quad MSTR
5V ECL Quad 4-Input OR/NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
Dual 4-5-Input OR/NOR
|
ON Semiconductor
|
| 74AHC74D-Q100 74AHCT74D-Q100 74AHC74BQ-Q100 74AHC7 |
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors
|
| 74HC74N652 |
Dual D-type flip-flop with set and reset; positive edge-trigger
|
NXP Semiconductors
|
| 74ALVC74PW 74ALVC74 74ALVC74BQ 74ALVC74D |
Dual D-type flip-flop with set and reset; positive-edge trigger 带设置和复位功能的双D触发器；上升沿触
|
NXP Semiconductors N.V.
|
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| 74F50729 N74F50729N I74F50729D I74F50729N N74F5072 |
Synchronizing dual D-type flip-flop with edge-triggered set and reset with metastable immune characteristics
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74AHC74D118 74AHCT74D 74AHC74PW-T 74AHCT74D-T 74AH |
Dual D-type flip-flop with set and reset; positive-edge trigger
Dual D-type flip-flop with set and reset; positive-edge trigger
|
NXP Semiconductors N.V.
|
| HCTS74MS |
Flip Flop, D-Type, with Set and Reset, TTL Inputs, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
