| PART |
Description |
Maker |
| IDT5T9050PGI IDT5T9050 |
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFERJR 2.5V的单数据传输速率1:5时钟缓冲器TERABUFFER⑩JR
2.5V SINGLE DATA RATE 1:5 CLOCK BUFFER TERABUFFER⑩ JR
2.5V Single Data Rate 1:5 Clock Buffer Terabuffer Jr.
|
Integrated Device Technology, Inc.
IDT[Integrated Device Technology]
|
| 106414-1401 |
QSFP to MPO Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate, 4dB Loss Budget, Cable Length 1.0m
|
Molex Electronics Ltd.
|
| 1064101200-17 |
QSFP to QSFP Quad Data Rate PSM4 Active Optical Cable, 40 Gbps Data Rate
|
Molex Electronics Ltd.
|
| EM423M3284LBA-8FE EM424M3284LBA-75FE EM424M3284LBA |
512Mb (4MBank2) Double DATA RATE SDRAM
512Mb (4MBank32) Double DATA RATE SDRAM
512Mb (4M4Bank2) Double DATA RATE SDRAM
|
Electronic Theatre Controls, Inc.
|
| M13S5121632A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| M13S2561616A-2S |
Double-data-rate architecture, two data transfers per clock cycle
|
Elite Semiconductor Mem...
|
| W9725G6JB25I |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| W9751G6KB-18 W9751G6KB-25 W9751G6KB-3 W9751G6KB25A |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| W631GG6KB-15 W631GG6KB12A W631GG6KB12I W631GG6KB12 |
Double Data Rate architecture: two data transfers per clock cycle
|
Winbond
|
| M14D2561616A-2E |
Internal pipelined double-data-rate architecture; two data access per clock cycle
|
Elite Semiconductor Mem...
|
| NT5DS4M32EG-6 NT5DS4M32EG NT5DS4M32EG-5 NT5DS4M32E |
1M 】 32 Bits 】 4 Banks Double Data Rate Synchronous RAM With Bi-Directional Data Strobe and DLL
|
NANOAMP[NanoAmp Solutions, Inc.]
|
| ADN2817ADN2818 ADN2818ACP-RL ADN2818ACP-RL7 ADN281 |
Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery ICs
Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery IC (With High Sensitivity Limiting Amp)
|
AD[Analog Devices]
Analog Devices, Inc.
|
