| PART |
Description |
Maker |
| 74LVX112SJ 74LVX112 74LVX112M 74LVX112MTC 74LVX112 |
LV/LV-A/LVX/H SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
Low Voltage Dual J-K Flip-Flops with Preset and Clear
|
FAIRCHILD SEMICONDUCTOR CORP
FAIRCHILD[Fairchild Semiconductor]
|
| MC10EP29MNTXG |
3.3V / 5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 10E SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC20
|
ON Semiconductor
|
| 74VHC74MTC 74VHC74N 74VHC74SJ 74VHC74 74VHC74MTCX |
Dual D-Type Flip-Flop 双D型触发器
Supervisor Push-Pull Active High, -40C to 85C, 3-SOT-23, T/R
Dual D-Type Flip-Flop with Preset and Clear
|
Fairchild Semiconductor, Corp.
|
| 74AUP2G80GN 74AUP2G80GD |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger 低功耗双D型触发器;上升沿触
|
NXP Semiconductors N.V.
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74AUP2G79GF 74AUP2G79GS |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| 74HC74DR2 74HC74DG |
Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
ON Semiconductor
|
| 74F11200 74F112SJ 74F112 74F112PC 74F112SC 74F112S |
From old datasheet system
Dual JK Negative Edge-Triggered Flip-Flop; Package: SOP; No of Pins: 16; Container: Tape & Reel F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| DM74ALS109A DM74ALS109AN DM74ALS109AM DM74ALS109AM |
From old datasheet system
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear(???杈圭?瑙????-K瑙?????甯??缃??娓??绔?伎
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
| HCF4518 HCF4518B HCF4518BC1 HCF4518BEY HCF4518BF H |
Dual Up-Counters(???璁℃???
DUAL UP-COUNTERS 双向上计数器
Replaced by SN54S74 : Dual D-type Positive-Edge-Triggered Flip-Flops With Preset And Clear 14-CDIP -55 to 125
Dual Up-Counters(双加计数
|
STMicroelectronics N.V.
意法半导
ST Microelectronics
SGS Thomson Microelectronics
|
| 74F113PC 74F113SC 74F113SJ 74F113 74F113SCX |
Dual JK Negative Edge-Triggered Flip-Flop F/FAST SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
| 74VHC74MTC 74VHC74MX 74VHC74SJ 74VHC74 74VHC74M 74 |
Dual D-Type Flip-Flop with Preset and Clear
Hex Schmitt-Trigger Inverters 14-TSSOP -40 to 85
Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 16-SOIC -40 to 85 AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
Quadruple 2-Line To 1-Line Data Selectors/Multiplexers 16-SOIC -40 to 85 AHC/VHC/H/U/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
Fairchild Semiconductor, Corp.
|
