| PART |
Description |
Maker |
| MC10H106 MC100EL29DWR2 MC10H117 MC10H117FN MC100EP |
Triple 4-3-3-Input NOR Gate
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
Dual 2-Wide 2-3-Input OR-AND/OR-AND-Invert Gate
3.3V / 5V ECL Differential Receiver/Driver with Variable Output Swing
5V ECL 2-Input XOR/XNOR
4-Wide OR-AND/OR-ANDbar Gate
5V ECL 1:2 Differential Fanout Buffer
3.3V / 5V ECL 6-Bit Differential Register with Master Reset
3.3V ECL Triple D-Type Flip-Flop with Set and Reset
3.3V / 5V ECL ÷2 Divider
5V ECL Differential Data and Clock D Flip-Flop
|
ON Semiconductor
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
| MC10EP131 MC10EP131FA MC10EP131FAR2 MC100EP131FAR2 |
3.3V / 5V ECL Quad D Flip-Flop with Set, Reset, and Differential Clock 3.3 / 5V的ECL四D触发器设置，复位拖鞋和差分时
3.3V / 5V ECL Quad D Flip-Flop with Set Reset and Differential Clock
|
ONSEMI[ON Semiconductor]
|
| MC100EL31D MC100EL31DG MC100EL31DR2 MC100EL31DR2G |
5 V ECL D Flip-Flop With Set and Reset
|
ONSEMI[ON Semiconductor]
|
| MC100LVEL31D MC100LVEL31DG MC100LVEL31DR2 MC100LVE |
3.3V ECL D Flip-Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
| MC100EL29-D |
5V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
|
ON Semiconductor
|
| MC100LVEL29-D |
3.3V ECL Dual Differential Data and Clock D Flip-Flop With Set and Reset
|
ON Semiconductor
|
| MC10H109FNR2 MC10H131 MC100EP140 MC100E155FN MC100 |
Dual 4-5-Input OR/NOR Gate
Dual Type D Master-Slave Flip-Flop
3.3V ECL Phase-Frequency Detector
5V ECL 6-Bit 2:1 Mux Latch
5V ECL Differential Data and Clock D Flip-Flop
3.3 V 1:9 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Enable
3.3V ECL 1:15 Differential ÷1/÷2 Clock Driver
ECL/TTL Clock Driver
3.3V / 5V 2-Input Differential AND/NAND
5V ECL 2:1 Multiplexer
3.3V / 5V ECL JK Flip Flop
3.3V ECL 1:4 ÷ 1/÷ 2 Clock Fanout Buffer
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V 10-bit LVTTL/LVCMOS to LVPECL Translator
Dual 2-Bit Adder/Subtractor
|
ON Semiconductor
|
| MC100EL29DW MC100EL29DWG MC100EL29DWR2 MC100EL29DW |
5V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset
|
ONSEMI[ON Semiconductor]
|
| 74AUP1G74GT-G 74AUP1G74GF |
Low-power D-type flip-flop with set and reset; positive-edge trigger AUP/ULP/V SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO8
|
NXP Semiconductors N.V.
|
| 74LV109 74LV109D 74LV109DB 74LV109N 74LV109PW 74LV |
Dual JK flip-flop with set and reset; positive-edge trigger LV/LV-A/LVX/H SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
NXP Semiconductors N.V.
PHILIPS[Philips Semiconductors]
|
| 74AUP1G74GD 74AUP1G74GM125 |
Low-power D-type flip-flop with set and reset; positive-edge trigger
Low-power D-type flip-flop with set and reset; positive-edge trigger; Package: SOT902-1 (XQFN8U); Container: Reel Pack, Reverse, Reverse
|
NXP Semiconductors
|
