| PART |
Description |
Maker |
| 74LCX112SJ 74LCX112 74LCX112M 74LCX112MTC 74LCX112 |
Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
From old datasheet system
|
Fairchild Semiconductor, Corp.
http://
FAIRCHILD[Fairchild Semiconductor]
|
| IN74AC112 |
Dual J-K Negative-Edge-Triggered Flip-Flop
|
IK Semiconductor
|
| SN74LS113D SN74LS113N SN54LS113J SN54LS113A |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
MOTOROLA[Motorola, Inc]
|
| HD74ACT112 HD74AC112 |
Dual JK Negative Edge-Triggered Flip-Flop
|
HITACHI[Hitachi Semiconductor]
|
| SN74LS73N |
DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
|
Motorola
|
| M74LS73AP |
Dual J-K Negative Edge-Triggered Flip Flop with Reset
|
MITSUBISHI[Mitsubishi Electric Semiconductor]
|
| PO74G112ATR PO74G112ATU PO74G112ASU PO74G112ASR |
DUAL NEGATIVE-EDGE-TRIGGERED J-K FLIP-FLOP WITH CLEAR AND PRESET
|
Potato Semiconductor Corporation
|
| 74HC112 74HCT112 74HC112N 74HC112D 74HC112DB 74HCT |
Dual JK flip-flop with set and reset; negative-edge trigger
|
PHILIPS[Philips Semiconductors]
NXP Semiconductors
|
| N74F114D N74F114N 74F114 |
Dual J-K negative edge-triggered flip-flop with common clock and reset
|
NXP Semiconductors
|
| 74F114PC |
Dual JK Negative Edge-Triggered Flip-Flop with Common Clocks and Clears
|
Fairchild Semiconductor
|
| MAX768 MAX768EEE MAX768C_D MAX768C/D |
Low-Noise, Dual-Output, Regulated Charge Pump for GaAsFET, LCD, and VCO Supplies
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset And Clear 16-CFP -55 to 125
|
MAXIM - Dallas Semiconductor
MAXIM[Maxim Integrated Products]
Maxim Integrated Products, Inc.
|
| DM74LS73A DM74LS73AN 74LS73 74LS73A DM74LS73AM |
Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
|
Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
|
