| PART |
Description |
Maker |
| HCF4027BC1 HCF4027B HCC4027BF |
DUAL-J-K MASTER-SLAVE FLIP-FLOP
|
ST Microelectronics
|
| TC4027BP07 |
Dual J-K Master-Slave Flip Flop
|
Toshiba Semiconductor
|
| DM7473 |
Dual Master-Slave J-K Flip-Flops
|
Fairchild
|
| CD4027BC |
Dual J-K Master/Slave Flip-Flop with Set and Reset
From old datasheet system
|
Fairchild
|
| MC10131 MC10131FN MC10131L MC10131P ON0568 |
From old datasheet system
PIN ASSIGNMENT
Dual TYPE D Master-Slave Flip-Flop
|
ONSEMI[ON Semiconductor]
Motorola, Inc
|
| MC1017602 MC10176L MC10176P MC10176FN MC10176 MC10 |
Hex D Master/Slave Flip-Flop
|
ONSEMI[ON Semiconductor]
|
| KK7472 KK7472D KK7472N |
AND-Gated J-K Master-Slave Flip- Flops with Reset and Clear
|
KODENSHI KOREA CORP.
|
| DFD2 |
DFD2 is a fast, static, master-slave D flip-flop with 2x drive strength. SET is asynchronous and active low.
|
AMSCO[austriamicrosystems AG]
|
| 7476 |
Dual Master Slave J-K F-F
|
Fairchild Semiconductor
|
| 7473 |
Dual Master-Slave J-K F-F
|
Fairchild Semiconductor
|
| MC100ELT23 MC100EL12DTR2 MC10H131FNR2 MC100H640FNR |
5V Dual Differential PECL to TTL Translator
5V ECL Low Impedance Driver
Dual Type D Master-Slave Flip-Flop
ECL/TTL Clock Driver
3.3V / 5V ECL Quad D Flip Flop with Set, Reset, and Differential Clock
3.3V / 5V ECL ÷4 Divider
Quad 2-Input NOR Gate
3.3V ECL Dual Differential Data and Clock D-Type Flip-Flop with Set and Reset
3.3V / 5V Hex Differential Line Receiver / Driver
3.3V / 5V Triple ECL Input to LVPECL/PECL Output Translator
|
ON Semiconductor
|
