| PART |
Description |
Maker |
| 74VHC11207 74VHC112MTCNL 74VHC112 |
Dual J-K Flip-Flops with Preset and Clear
Dual J-K Flip-Flops with Preset and Clear AHC/VHC SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
|
Fairchild Semiconductor, Corp.
|
| LC866408 LC866412 LC866416 LC866420 LC866424 SANYO |
Octal D-Type Flip-Flops With Clear 20-SO -40 to 85
Octal D-Type Flip-Flops With Clear 20-SOIC -40 to 85
Octal Bus Transceivers With 3-State Outputs 20-VQFN -40 to 85
8-Bit Single Chip Microcontroller with the UVEPROM
|
http://
Sanyo Electric Co.,Ltd.
|
| HD74HC109 HD74HC109RPEL HD74HC109FPEL HD74HC109P |
Dual J-K Flip-Flops (with Preset and Clear)
|
Renesas Electronics Corporation
|
| HD74LVC74 |
Dual D-type Flip Flops with Preset and Clear
|
Hitachi Semiconductor
|
| M27W201-80K6TR M27W201-200NZ6TR M27W201-80NZ6TR M2 |
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
Test Spring Probe; Current Rating:3A; Leaded Process Compatible:Yes; Length:0.060"; Peak Reflow Compatible (260 C):No; Tip/Nozzle Style:90 Concave RoHS Compliant: Yes 2兆位56Kb × 8低压紫外线可擦写可编程只读存储器和OTP存储
Triple 3-Input Positive-AND Gates 14-SO 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SO 0 to 70
Triple 3-Input Positive-AND Gates 14-PDIP 0 to 70
Triple 3-Input Positive-AND Gates 14-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-SOIC 0 to 70
Dual J-K Positive-Edge-Triggered Flip-Flops With Clear And Preset 16-PDIP 0 to 70
2 Mbit 256Kb x 8 Low Voltage UV EPROM and OTP EPROM
2 MBIT (256KB X8) LOW VOLTAGE OTP EPROM
|
STMicroelectronics N.V.
意法半导
STMICROELECTRONICS[STMicroelectronics]
ST Microelectronics
|
| HD74HCT74A HD74HCT74AT HD74HCT74AFP |
Dual D-type Positive Edge-triggered Flip Flops with Clear and Preset
Octal D-Type Edge Triggered Flip-Flops with 3-State Outputs 20-CDIP -55 to 125
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|TSSOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|D TYPE|HCT-CMOS|SOP|14PIN|PLASTIC
|
Hitachi,Ltd.
HITACHI[Hitachi Semiconductor]
|
| MC10135 MC10135FN MC10135L MC10135P ON0571 |
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CFP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Replaced by SN54LS175 : Quadruple D-type Flip-Flops With Clear 16-CDIP -55 to 125 10K SERIES, POSITIVE EDGE TRIGGERED JBAR-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Dual J-K Master-Slave Flip-Flop
PIN ASSIGNMENT
From old datasheet system
|
Motorola Mobility Holdings, Inc.
Motorola, Inc.
ONSEMI[ON Semiconductor]
|
| HD74LS107A HD74LS107AFPEL HD74LS107AP |
Dual J-K Negative-edge-triggered Flip-Flops (with Clear)
|
Renesas Electronics Corporation
|
| UT54ACS74 UT54ACTS74 |
Radiation-Hardened Dual D Flip-Flops with Clear & Preset
|
ETC
|
| DM7473N DM7473 7473 |
Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
|
Fairchild Semiconductor Corporation
|
| HD74LV2G74A |
Single D-ype Flip Flops with Preset and Clear
Single D-type Flip Flops with Preset and Clear
|
HITACHI[Hitachi Semiconductor]
|
| DM74LS74A DM74LS74AM DM74LS74AN DM74LS85ASJ DM74LS |
Dual Positive-Edge-Triggered D Flip-Flops with Preset/ Clear and Complementary Outputs
Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs
|
FAIRCHILD[Fairchild Semiconductor]
|
