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Zarlink Semiconductor Inc.
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| Part No. |
ZL30409/DDB ZL30409/DDA
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| OCR Text |
...iption the zl30409 t1/e1 system synchronizer contains a digital phase-locked loop (dpll), which provides timing and synchronization signals for multitrunk t1 and e1 primary rate transmission links. the zl30409 generates st-bus clock and fra... |
| Description |
T1/E1 System synchronizer with Stratum 3 Holdover
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| File Size |
290.90K /
32 Page |
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Download Datasheet
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http://
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| Part No. |
XRT94L33 XRT94L33IB XRT94L333
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| OCR Text |
...33 uses the internal e3/ds3 de- synchronizer circuit with an internal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any extern... |
| Description |
-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SONET REGISTERS
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| File Size |
3,662.00K /
801 Page |
View
it Online |
Download Datasheet |
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Zarlink
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| Part No. |
ZL30409
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| OCR Text |
synchronizer with Stratum 3 Holdover
Data Sheet Features
* * * * Supports Telcordia GR-1244-CORE Stratum 4 timing for DS1 interfaces Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces Selectable 19.44 MHz, 2.048M... |
| Description |
T1/E1 System synchronizer with Stratum 3 Holdover
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| File Size |
277.95K /
32 Page |
View
it Online |
Download Datasheet |
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ZARLINK[Zarlink Semiconductor Inc]
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| Part No. |
MT9045AN MT9045
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| OCR Text |
synchronizer
Data Sheet Features
* Supports AT&T TR62411 and Bellcore GR-1244CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces Supports ITU-T G.813 Option 1 clocks for 2048 kbit/s interfaces Supports ITU-T G.812 T... |
| Description |
Dual reference frequency selectable 3.3V Digital PLL with multiple clock outputs for T1/E1 (ITU-T G.812 type IV), Stratum( 3, 4, 4E) and STS-3/OC3 systems
T1/E1/OC3 System synchronizer
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| File Size |
292.25K /
34 Page |
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it Online |
Download Datasheet |
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http://
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| Part No. |
XRT94L33 XRT94L332 XRT94L33IB
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| OCR Text |
...33 uses the internal e3/ds3 de- synchronizer circuit with an internal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any extern... |
| Description |
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER - SDH REGISTERS
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| File Size |
3,684.65K /
810 Page |
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it Online |
Download Datasheet |
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http://
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| Part No. |
XRT94L33IB XRT94L3306
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| OCR Text |
...33 uses the internal e3/ds3 de- synchronizer circuit with an internal pointer leak algorithm for clock smoothing as well as to remove the jitter due to mapping and pointer movements. these de-synchronizer circuits do not need any extern... |
| Description |
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC DATA SHEET
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| File Size |
2,228.85K /
465 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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