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AGERE[Agere Systems]
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| Part No. |
ORT8850L ORT8850 ORT8850H
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| OCR Text |
... 624 2024 FPGA User I/O 296 536 luts 4,992 16,192 EBR Blocks 8 16 EBR Bits (K) 74 147 Usable Gates (K) 260--470 530--970
Note: The embedded core and interface are not included in the above gate counts.The usable gate counts range from a ... |
| Description |
Field-Programmable System Chip (FPSC) Eight-Channel x 850 Mbits/s Backplane Transceiver
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| File Size |
959.67K /
112 Page |
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AGERE[Agere Systems]
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| Part No. |
ORT82G5
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| OCR Text |
...tal PFUs 1296 User I/O 372/432 luts 10,368 EBR Blocks 12 EBR Bits Usable Gates (k) (k) 111 380--800
The embedded core and interface are not included in the above gate counts. The usable gate counts range from a logic-only gate count to... |
| Description |
ORCA ORT82G5 1.0.1-25/2.0-2.5/3.125 Gbits/s Backplane Interface FPSC
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| File Size |
773.24K /
92 Page |
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it Online |
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AGERE[Agere Systems]
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| Part No. |
ORLI10G
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| OCR Text |
... Total PFUs 1296 User I/Os* 432 luts 10,368 EBR Blocks 12 EBR Bits (k) 111 Usable Gates (k) 380--800
* 192 user I/Os for the 416 PBGAM package and 316 user I/Os for the 680 PBGAM package are available out of the 432 possible user I/Os. N... |
| Description |
Quad 2.5 Gbits/s 10 Gbits/s, and 12.5 Gbits/s Line Interface FPSC
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| File Size |
701.51K /
72 Page |
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it Online |
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AGERE[Agere Systems]
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| Part No. |
OR3TP12
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| OCR Text |
... of Number of Max User Max User luts Registers RAM I/Os 2016 2636 32K 187 Array Size 14 x 18 Number of PFUs 252
* The embedded core and interface comprise approximately 85K standard-cell ASIC gates in addition to these usable gates. The ... |
| Description |
Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface
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| File Size |
1,663.51K /
128 Page |
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it Online |
Download Datasheet |
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