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Cypress Semiconductor, Corp.
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| Part No. |
CY7C1550KV18-450BZC CY7C1550KV18-400BZC CY7C1548KV18-400BZC
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| OCR Text |
72-mbit ddr ii+ sram 2-word burst architecture (2.0 cycle read latency) cypress semiconductor corporation ? 198 champion court ? san jose , ...bit words (cy7c1546kv18), 9-bit words (cy7c1557kv18), 18-bit words (cy7c1548kv18), or 36-bit words (... |
| Description |
Sync SRAM; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 DDR SRAM, 0.45 ns, PBGA165
72-Mbit DDR II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)
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| File Size |
657.16K /
31 Page |
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Cypress Semiconductor, Corp.
CYPRESS SEMICONDUCTOR CORP
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| Part No. |
CY7C1515AV18-200BZXI CY7C1526AV18-278BZXC CY7C1526AV18-250BZI CY7C1526AV18-300BZI CY7C1526AV18-250BZXI
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| OCR Text |
72-mbit qdr?-ii sram 4-word burst architecture cy7c1511av18, cy7c1526av18 cy7c1513av18, cy7c1515av18 cypress semiconductor corporation ? 19...bit words (cy7c1511av18), 9-bit words (cy7c1526av18), 18-bit words (cy7c1513av18), or 36-bit words (... |
| Description |
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 2M X 36 QDR SRAM, 0.45 ns, PBGA165
8M X 9 QDR SRAM, 0.45 ns, PBGA165
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| File Size |
485.08K /
31 Page |
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it Online |
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Cypress Semiconductor, Corp.
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| Part No. |
CY7C1163V18-400BZC
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| OCR Text |
...egister reg. reg. reg. 36 18 18 72 18 bws [1:0] v ref write add. decode write reg 36 a (17:0) 18 256k x 18 array 256k x 18 array 256k x 18 a...bit data transfers in the case of cy7c1161v18, four 9-bit data transfers in the case of cy7c1176v18,... |
| Description |
18-Mbit QDR™-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 1M X 18 QDR SRAM, 0.45 ns, PBGA165
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| File Size |
461.23K /
29 Page |
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Linear Technology, Corp.
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| Part No. |
ADS5546IRGZR
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| OCR Text |
...l to noise ratio f in = 150 mhz 72.2 dbfs 0 db gain, 2 v pp fs (1) 71 f in = 225 mhz 3 db gain, 1.4 v pp fs 69.8 0 db gain, 2 v pp fs 70 f i...bit clock duty cycle (clkoutp-clkoutm) 45% 50% 55% 80 fs 190 msps rise time measured from ?50 mv t... |
| Description |
14-BIT, 190 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS 1490 MSPS的ADC，具有复员的LVDS / CMOS输出
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| File Size |
1,280.33K /
50 Page |
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Cypress Semiconductor, Corp.
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| Part No. |
CY7C1565V18-300BZI
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| OCR Text |
72-mbit qdr?-ii+ sram 4-word burst architecture (2.5 cycle read latency) cy7c1561v18, cy7c1576v18 cy7c1563v18, cy7c1565v18 cypress semicondu...bit words (cy7c1561v18), 9-bit words (cy7c1576v18), 18-bit words (cy7c1563v18), or 36-bit words (cy7... |
| Description |
72-Mbit QDRII SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 2M X 36 QDR SRAM, 0.45 ns, PBGA165
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| File Size |
426.28K /
28 Page |
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Fujitsu Media Devices
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| Part No. |
MB91F475
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| OCR Text |
... addition (32-bit 32-bit + 72-bit) ? operation result is extracted rounded from 72 bits to 32 bits or 72-bit result data reading. dmac (dma controller) ? transfers can be started by software or by interrupts from the built-in p... |
| Description |
(MB91470 / MB91480 Series) 32-bit proprietary Microcontrollers CMOS
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| File Size |
928.12K /
88 Page |
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it Online |
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