|
|
 |
Integrated Silicon Solution
|
Part No. |
IS42S32800D
|
OCR Text |
...6mb sdram is organized in 2meg x 32 bit x 4 banks. 8m x 32 256mb synchronous dram april 2009 key timing parameters parameter -6 -7 -75e unit clk cycle time cas latency = 3 6 7 ns cas latency = 2 ... |
Description |
8M x 32 256Mb SYNCHRONOUS DRAM
|
File Size |
862.59K /
60 Page |
View
it Online |
Download Datasheet
|
|
|
 |
BI Technologies Corporation
|
Part No. |
93PR200KLF
|
OCR Text |
2meg standard resistance tolerance ?0% (<100 ohms = ?0%) input voltage, maximum 200 vdc or rms not to exceed power rating slider current, maximum 100ma or within rated power, whichever is less power rating, watts 1.0 at 70? derating to 0 a... |
Description |
1/2 Diameter Single Turn Cermet Trimming Potentiometer
|
File Size |
45.05K /
3 Page |
View
it Online |
Download Datasheet
|
|
|
 |
BI Technologies Corporation
|
Part No. |
91AR100KLF 91AR200KLF 91AR20KLF 91AR10KLF 91AR250KLF 91AR500KLF
|
OCR Text |
...rd resistance range, ohms 10 to 2meg standard resistance tolerance ?0% input voltage, maximum 250 vdc or rms not to exceed power rating slider current, maximum 100ma or within rated power, whichever is less power rating, watts 0.5 at 70? d... |
Description |
3/8 Diameter Single Turn Cermet Trimming Potentiometer
|
File Size |
64.93K /
4 Page |
View
it Online |
Download Datasheet
|
|
|
 |
IDT
|
Part No. |
IDT72V36110
|
OCR Text |
...0 131,072 x 36 Higher density, 2meg and 4Meg SuperSync II FIFOs Up to 166 MHz Operation of the Clocks User selectable Asynchronous read and/or write ports (PBGA Only) User selectable input and output port bus-sizing - x36 in to x36 out - x... |
Description |
3.3 VOLT HIGH-DENSITY SUPERSYNC II? 36-BIT FIFO
|
File Size |
442.15K /
47 Page |
View
it Online |
Download Datasheet
|
|
|
 |
Electronic Theatre Controls, Inc.
|
Part No. |
EM488M1644VTB-75F EM488M1644VTB-6F EM488M1644VTB-7F
|
OCR Text |
...memory (sdram) organized as 2meg words x 4 banks by 16 bits. all inputs and outputs are synchronized with the positive edge of the clock. the 128mb sdram uses synchronized pipelined architecture to achieve high ... |
Description |
128Mb (2MBank16) Synchronous DRAM 128Mb (2MBank6) Synchronous DRAM 128Mb的(200万Bank6)同步DRAM 128Mb (2M??Bank??6) Synchronous DRAM
|
File Size |
254.21K /
17 Page |
View
it Online |
Download Datasheet
|
|

Price and Availability
|