|
|
|
Exar, Corp.
|
Part No. |
ST16C2550
|
OCR Text |
...eceive channels (a-b). rxrdy is primarily intended for monitoring dma mode 1 transfers for the receive data fifos. a logic 0 indicates there is receive data to read/ unload, i.e., receive ready status with one or more rx characters availabl... |
Description |
Dual UART with 16-Byte of Transmit and Receive FIFO(双通用异步接收发送器(带16字节接收和发送先进先出)) 双UART具有16的发送和接收FIFO(双通用异步接收发送器(带16字节接收和发送先进先出字节)
|
File Size |
320.33K /
34 Page |
View
it Online |
Download Datasheet |
|
|
|
Motorola Mobility Holdings, Inc.
|
Part No. |
MC34119D
|
OCR Text |
...r intergrated circuit intended (primarily) for telephone applications, such as in speakerphones. it provides differential speaker outputs to maximize output swing at low supply voltages (2.0 v minimum). coupling capacitors to the speaker ar... |
Description |
LOW POWER AUDIO AMPLIFIER 0.4 W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO8
|
File Size |
267.67K /
12 Page |
View
it Online |
Download Datasheet |
|
|
|
Philips
|
Part No. |
TJA1054U/N1
|
OCR Text |
...oller area network (can). it is primarily intended for low-speed applications up to 125 kbaud in passenger cars. the device provides differential receive and transmit capability but will switch to single-wire transmitter and/or receiver in ... |
Description |
Fault-tolerant CAN transceiver
|
File Size |
125.37K /
24 Page |
View
it Online |
Download Datasheet |
|
|
|
NXP Semiconductors N.V.
|
Part No. |
SC16C652BIBS151 SC16C652BIB48157 SC16C652BIB48151 SC16C652BIB48
|
OCR Text |
...e channels (a to b). rxrd yn is primarily intended for monitoring dma mode 1 transfers for the receive data fifos. a logic 0 indicates there is a receive data to read/upload, that is, receive ready status with one or more rx characters avai... |
Description |
5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT313-2 (LQFP48); Container: Tray Pack, Bakeable, Single 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT313-2 (LQFP48); Container: Tray Pack, Bakeable, Multiple 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP48 5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.) with 32-byte FIFOs and infrared (IrDA) encoder/decoder; Package: SOT617-1 (HVQFN32); Container: Tray Pack, Bakeable, Single 2 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQCC32
|
File Size |
193.61K /
43 Page |
View
it Online |
Download Datasheet |
|
|
|
NEC, Corp.
|
Part No. |
128MD-40-800
|
OCR Text |
...called row2..row0, and are used primarily for controlling row accesses. rq4..rq0 are also called col4..col0, and are used primarily for controlling column accesses. row pins: the principle use of these three pins is to manage the tran... |
Description |
8M X 16 DIRECT RAMBUS DRAM, 40 ns, PBGA62 CENTER BONDED, BGA-62
|
File Size |
2,646.94K /
66 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|