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				Actel Corporation
Part No.	MC-ACT-16550-NET MC-ACT-16550-VLOG
OCR Text	...Designer place and route tool > compiled RTL simulation model, compliant with the Actel Libero(R) environment -- RTL Version > VHDL or Verilog RTL Source Code The MC-ACT-TWSI is a "core" logic module specifically designed for Actel FPGAs...
Description	Two Wire Serial Interface (TWSI)
File Size	275.81K / 9 Page	View it Online	Download Datasheet

				ST Microelectronics STMicroelectronics
Part No.	CB55000 8590
OCR Text	...ries of module generators using compiled cell generation techniques are available to support a range of megacells. These modules enable the designer to choose individual parameters in order to create a compiled cell, which meets the specifi...
Description	HCMOS7 STANDARD CELLS From old datasheet system HCMOS7 STANDARD CELLS
File Size	2,532.22K / 15 Page	View it Online	Download Datasheet

				Actel Corporation
Part No.	CORESDLC-AN CORESDLC-AR CORESDLC-EV CORESDLC-SN CORESDLC-SR CORESDLC-UR CORESDLC-XX
OCR Text	...r Software Place-and-Route Tool compiled RTL Simulation Supported in Actel Libero IDE Model Fully RTL Version Verilog and VHDL Core Source Code Core Synthesis Scripts Key Features * * * * * * * * * * * * * * Based on Intel's 80C152 G...
Description	CoreSDLC
File Size	151.84K / 21 Page	View it Online	Download Datasheet

				ST Microelectronics STMICROELECTRONICS[STMicroelectronics] 意法半导 STMicroelectronics N.V.
Part No.	486DX-CORE ST486DXASICCORE 4195 486DX2 ST486DX4 486DX 486DX4 ST486DX ST486DX2
OCR Text	...parameters in order to create a compiled cell, which meets the specific application requirements. Generators are available for megafunctions such as single port RAM and dual port RAM and ROM. The compiled cell generators construct custom ce...
Description	FULLY STATIC 3.3V 486 ASIC CORE From old datasheet system Fully Static 3.3V 486 DX/DX2/DX4 ASIC CORE FULLY STATIC 3.3V 486 ASIC CORE ST 486 DX ASIC CORE 意法半导体专用集成电路核86霉素
File Size	114.87K / 8 Page	View it Online	Download Datasheet

				Actel Corporation
Part No.	COREAI-AN COREAI-AR COREAI-EV COREAI-M COREAI-SN COREAI-SR COREAI-UG COREAI-UR COREAI-XX
OCR Text	...erables * Evaluation Version - compiled RTL Simulation Model Fully Supported in Actel Libero(R) Integrated Design Environment (IDE) Structural Verilog and VHDL Netlists (with and without I/O Pads) Compatible with Actel Designer Software Pl...
Description	CoreAI
File Size	169.24K / 25 Page	View it Online	Download Datasheet

				Actel Corporation
Part No.	CORE8051-AN CORE8051-AR CORE8051-EV CORE8051-SN CORE8051-SR CORE8051-UR CORE8051-XX
OCR Text	...erables * Evaluation Version - compiled RTL Simulation Model Fully Supported in the Actel Libero(R) Integrated Design Environment (IDE) Netlist Version - Structural Verilog and VHDL Netlists (with and without I/O Pads) Compatible with the ...
Description	Core8051
File Size	284.13K / 41 Page	View it Online	Download Datasheet

				Actel Corporation
Part No.	COREAES128 COREAES128-AN COREAES128-AR COREAES128-EV COREAES128-SN COREAES128-SR COREAES128-UR
OCR Text	...ncial Security Is Mandatory * - compiled RTL Simulation Supported in Actel Libero IDE Model Fully RTL Version - - Verilog and VHDL Core Source Code Core Synthesis Scripts * Actel-Developed Testbench (Verilog and VHDL) Synthesis ...
Description	CoreAES128
File Size	115.49K / 13 Page	View it Online	Download Datasheet

				ATMEL Corporation
Part No.	AVR32UC
OCR Text	... recognized benchmarks has been compiled and analyzed to achieve the best code density in its class of microprocessor architectures. In addition to lowering the memory requirements, a compact code size also contributes to the core's low pow...
Description	Technical Reference Manual
File Size	1,114.92K / 118 Page	View it Online	Download Datasheet

				AD[Analog Devices]
Part No.	ADDS-2101-3V ADDS-2101-EZ-ICE ADDS-2101-EZ-KIT ADDS-2101-EZ-LAB ADDS-2181-EZ-ICE ADDS-2111-EZ-KIT ADDS-2171-EZ-ICE ADDS-2171-EZ-LAB ADDS-2111-EZ-ICE ADDS-2111-EZ-LAB ADDS-2171-EZ-ICE-P ADDS-21XX-EZLITE ADDS-21XX-TOOLS ADDS-21XX-SW-SUN ADDS-21XX-SW-PC
OCR Text	...code modules. These modules are compiled/assembled separately and then linked together to form an executable program (memory image file). The highly readable algebraic syntax of the ADSP-2100 Family instruction set eases programming in asse...
Description	ADSP-2100 Family Development Tools
File Size	106.85K / 16 Page	View it Online	Download Datasheet

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