| |
|
 |
Atmel Corp.
|
| Part No. |
ATAR090 ATAR890
|
| OCR Text |
...yte sso20 instruction decoder ccr tos alu ram rp x y program 256 x 4-bit marc4 core clock reset sleep memory bus i/o bus instruction bus reset system clock interrupt controller on-chip peripheral modules memory sp pc
4 atar090/at... |
| Description |
Low-current Microcontroller for Wireless Communication
2 KB ROM, 2 Timer, SSI, 12 I/O Lines, V
2 KB ROM, 2 Timer, SSI, 12 I/O Lines, 64 Byte EEPROM, V
|
| File Size |
713.43K /
75 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
Intel
|
| Part No. |
87C196KD 27216802
|
| OCR Text |
...Input for buswidth selection If ccr bit 1 is a one this pin selects the bus width for the bus cycle in progress If BUSWIDTH is a 1 a 16-bit bus cycle occurs If BUSWIDTH is a 0 an 8-bit cycle occurs If ccr bit 1 is a 0 the bus is always an 8... |
| Description |
16-Bit High-Performance CHMOS Microcontroller
From old datasheet system
|
| File Size |
230.29K /
21 Page |
View
it Online |
Download Datasheet |
| |
|
|
Intel
|
| Part No. |
87C196KS 87C196KT 27251303
|
| OCR Text |
...nput for bus width selection If ccr bit 1 is a one and ccr1 bit 2 is a one this pin dyamically controls the Buswidth of the bus cycle in progress If BUSWIDTH is low an 8-bit cycle occurs if BUSWIDTH is high a 16-bit cycle occurs If ccr bit ... |
| Description |
20MHz ADVANCED 16-BIT CHMOS MICROCONTROLLER
From old datasheet system
|
| File Size |
376.47K /
34 Page |
View
it Online |
Download Datasheet |
| |
|
|
Intel
|
| Part No. |
8XC196KB16 8XC196KB 27090906
|
| OCR Text |
...Input for buswidth selection If ccr bit 1 is a one this pin selects the bus width for the bus cycle in progress If BUSWIDTH is a 1 a 16-bit bus cycle occurs If BUSWIDTH is a 0 an 8-bit cycle occurs If ccr bit 1 is a 0 the bus is always an 8... |
| Description |
Commercial/Express CHMOS Microcontroller
From old datasheet system
|
| File Size |
283.48K /
22 Page |
View
it Online |
Download Datasheet |
| |
|
|
Intel
|
| Part No. |
8XC196MD 27232302
|
| OCR Text |
...ess Valid output as selected by ccr Both options allow a latch to demultiplex the address data bus on the signal's falling edge When the pin is ADV it goes inactive (high) at the end of the bus cycle ALE ADV is active only during external m... |
| Description |
Industrial Motor Control Microcontroller
From old datasheet system
|
| File Size |
265.37K /
25 Page |
View
it Online |
Download Datasheet |
| |
|
|
Intel
|
| Part No. |
8XC196NT 27226705
|
| OCR Text |
...nput for bus width selection If ccr bit 1 is a one and ccr1 bit 2 is a one this pin dyamically controls the Buswidth of the bus cycle in progress If BUSWIDTH is low an 8-bit cycle occurs if BUSWIDTH is high a 16-bit cycle occurs If ccr bit ... |
| Description |
CHMOS MICROCONTROLLER WITH 1 MBYTE LINEAR ADDRESS SPACE
From old datasheet system
|
| File Size |
476.49K /
31 Page |
View
it Online |
Download Datasheet |
| |
|
|
Atmel
|
| Part No. |
ATAR092-D
|
| OCR Text |
...yte sso20 instruction decoder ccr tos alu ram rp x y program 256 x 4-bit marc4 core clock reset sleep memory bus i/o bus instruction bus reset system clock interrupt controller on-chip peripheral modules memory sp pc
4 atar092-d ... |
| Description |
4 KB ROM, 3 Timer, SSI, 16 I/O Lines, V
|
| File Size |
881.72K /
92 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
