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differential lvcmos-to-lvcmos Datasheet PDF File

For differential lvcmos-to-lvcmos Found Datasheets File :: 4158 Search Time::5.515ms
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				ICSI[Integrated Circuit Solution Inc] ICST[Integrated Circuit Systems]
Part No.	ICS95V857 ICS95V857AG-130LF-T ICS95V857AGLF-T
OCR Text	...tter PLL clock driver * 1 to 10 differential clock distribution (SSTL_2) * Feedback pins for input to output synchronization * PD# for power...LVCMOS input DESCRIPTION FB_OUTT FB_INT FB_INC PD# OUT IN IN IN This PLL Clock Buffer is de...
Description	16-Bit Registered Transceivers With 3-State Outputs 56-SSOP -40 to 85 2.5V Wide Range Frequency Clock Driver (45MHz - 233MHz)
File Size	113.77K / 13 Page	View it Online	Download Datasheet

				MAXIM[Maxim Integrated Products]
Part No.	MAX9124 MAX9124ESE MAX9124EUE
OCR Text	...n The MAX9124 quad low-voltage differential signaling (LVDS) line driver is ideal for applications requiring high data rates, low power, an...LVCMOS input levels and translates them to LVDS output signals. Moreover, the MAX9124 is capable of ...
Description	Quad LVDS Line Driver
File Size	193.88K / 9 Page	View it Online	Download Datasheet

				MAXIM[Maxim Integrated Products]
Part No.	MAX9125 MAX9125ESE MAX9125EUE MAX9126ESE MAX9126EUE MAX9126
OCR Text	...AX9125/MAX9126 quad low-voltage differential signaling (LVDS) line receivers are ideal for applications requiring high data rates, low power...LVCMOS DATA INPUT TX 115 RX TX 115 RX LVTTL/LVCMOS DATA OUTPUT TX 115 ...
Description	Quad LVDS Line Receivers with Integrated Termination
File Size	222.99K / 12 Page	View it Online	Download Datasheet

				MICREL[Micrel Semiconductor] Micrel Semiconductor,Inc. MICREL INC
Part No.	SY10EPT20V SY10EPT20VKC SY10EPT20VKCTR SY10EPT20VZC SY10EPT20VZCTR SY100EPT20V SY100EPT20VKC SY100EPT20VKCTR SY100EPT20VZC SY100EPT20VZCTR
OCR Text	...300ps typical propagation delay differential LVPECL output ICC Max 20mA PNP LVTTL input for minimal loading Q output will default HIGH with ...LVCMOS/ LVPECL or TTL/CMOS/PECL systems. The device only requires a single positive supply of 3.3V o...
Description	3.3V/5V LVTTL/LVCMOS-to- differential LVPECL TRANSLATOR
File Size	85.84K / 8 Page	View it Online	Download Datasheet

				SONY[Sony Corporation]
Part No.	CXK77B3610GB- CXK77B3610GB-6 CXK77B3610GB-7 CXK77B3610GB
OCR Text	... high voltage Input low voltage differential clock input signal differential clock input common mode Symbol VDD VDDQ VIH VIL VK VK, COM Min. 3.15 3.15 2.0 -0.3 0.4 1.2 (Ta = 25C, GND = 0V) Typ. 3.3 3.3 -- -- 0.8 2.0 Max. 3.45 3.45 VDD +0...
Description	High Speed 1MBit Bi-CMOS Synchronous Static RAM(高M位Bi-CMOS同步静态RAM) High Speed Bi-CMOS Synchronous Static RAM From old datasheet system
File Size	197.33K / 16 Page	View it Online	Download Datasheet

				CYPRESS SEMICONDUCTOR CORP CYPRESS[Cypress Semiconductor] Cypress Semiconductor, Corp.
Part No.	CY29940 CY29940AC CY29940ACT CY29940AI CY29940AIT
OCR Text	...e capability to select either a differential LVPECL or a LVCMOS/LVTTL compatible input clock. The two clock sources can be used to provide for a test clock as well as the primary system clock. All other control inputs are LVCMOS/LVTTL compa...
Description	2.5V or 3.3V/ 200-MHz/ 1:18 Clock Distribution Buffer 2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer 29940 SERIES, LOW SKEW CLOCK DRIVER, 18 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP32
File Size	188.76K / 7 Page	View it Online	Download Datasheet

				CYPRESS[Cypress Semiconductor]
Part No.	CY29949 CY29949AC CY29949ACT CY29949AI CY29949AIT
OCR Text	...e capability to select either a differential LVPECL or LVCMOS/LVTTL compatible input clocks. These clock sources can be used to provide for test clocks as well as the primary system clocks. All other control inputs are LVCMOS/LVTTL compatib...
Description	2.5V or 3.3V 200-MHz 1:15 Clock Distribution Buffer
File Size	65.02K / 7 Page	View it Online	Download Datasheet

				NXP Semiconductors PHILIPS[Philips Semiconductors]
Part No.	SSTL16857 SSTL16857DGG
OCR Text	differential clock inputs Product specification Supersedes data of 1999 Apr 29 1999 Sep 30 Philips Semiconductors Philips Semiconduct...LVCMOS asynchronous master reset (Active LOW) LOGIC DIAGRAM RESET VREF D1 REGISTER Q1 D...
Description	14-bit SSTL_2 registered driver with differential clock inputs
File Size	76.86K / 8 Page	View it Online	Download Datasheet

For differential lvcmos-to-lvcmos Found Datasheets File :: 4158 Search Time::5.515ms
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