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  three-linear Datasheet PDF File

For three-linear Found Datasheets File :: 10483    Search Time::3.078ms    
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    CS5205A-1 CS5205A-1.REV5

ON Semiconductor
Part No. CS5205A-1 CS5205A-1.REV5
OCR Text ...on http://onsemi.com TO-220 THREE LEAD T SUFFIX CASE 221A 1 2 Tab = VOUT Pin 1. Adj 2. VOUT 3. VIN 3 D2PAK 3-PIN DP SUFFIX CASE 41...linear regulator provides an adjustable voltage at currents up to 5.0 A. The regulator is protected ...
Description 5.0 A Adjustable LinearRegulator
From old datasheet system

File Size 68.44K  /  8 Page

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    CY7C1338F CY7C1338F-100AI CY7C1338 CY7C1338F-66BGI CY7C1338F-100AC CY7C1338F-100BGC CY7C1338F-100BGI CY7C1338F-117AC CY7

CYPRESS[Cypress Semiconductor]
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
Part No. CY7C1338F CY7C1338F-100AI CY7C1338 CY7C1338F-66BGI CY7C1338F-100AC CY7C1338F-100BGC CY7C1338F-100BGI CY7C1338F-117AC CY7C1338F-117AI CY7C1338F-117BGC CY7C1338F-117BGI CY7C1338F-133AC CY7C1338F-133AI CY7C1338F-133BGC CY7C1338F-133BGI CY7C1338F-66AC CY7C1338F-66AI CY7C1338F-66BGC CYPRESSSEMICONDUCTORCORP-CY7C1338F-66AI CY7C1338F-66AXC
OCR Text ...n deasserted HIGH, I/O pins are three-stated, and act as input data pins. OE is masked during the first clock of a read cycle when emerging ...linear burst sequence. When tied to VDD or left floating selects interleaved burst sequence. This is...
Description DIODE ZENER TRIPLE ISOLATED 200mW 36Vz 0.05mA-Izt 0.05 0.05uA-Ir 27.3 SOT-363 3K/REEL 128K X 32 CACHE SRAM, 11 ns, PBGA119
DIODE ZENER TRIPLE ISOLATED 200mW 39Vz 0.05mA-Izt 0.05 0.05uA-Ir 29.6 SOT-363 3K/REEL 128K X 32 CACHE SRAM, 11 ns, PBGA119
4-Mb (128K x 32) Flow-Through Sync SRAM 128K X 32 CACHE SRAM, 11 ns, PQFP100
DIODE ZENER TRIPLE ISOLATED 200mW 33Vz 0.05mA-Izt 0.05 0.05uA-Ir 25 SOT-363 3K/REEL 128K X 32 CACHE SRAM, 11 ns, PQFP100
4-Mb (128K x 32) Flow-Through Sync SRAM 128K X 32 CACHE SRAM, 7.5 ns, PQFP100

File Size 401.99K  /  17 Page

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    71V3558S200PFG

Integrated Device Technology
Part No. 71V3558S200PFG
OCR Text ...heir previous values. there are three chip enable pins ( ce 1 , ce 2 , ce 2 ) that allow the user to deselect the device when desired. if a...linear) individual byte write ( bw 1 - bw 4 ) control (may tie active) three chip enable...
Description 128K x 36, 256K x 18 3.3V Synchronous ZBT SRAMs 3.3V I/O, Burst Counter Pipelined Outputs

File Size 644.98K  /  28 Page

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    IDT[Integrated Device Technology]
Part No. IDT71V65603 IDT71V65803S150PFI IDT71V65803S150BQI IDT71V65803S150BQ IDT71V65803S150BGI IDT71V65803S150BG IDT71V65803S133PFI IDT71V65803S133PF IDT71V65803S133BQI IDT71V65803S133BQ 71V65603_DS_59816 IDT71V65603S100BG IDT71V65603S100BGI IDT71V65603S100BQ IDT71V65603S100BQI IDT71V65603S100PF IDT71V65603S100PFI IDT71V65603S133BG IDT71V65603S133BGI IDT71V65603S133BQ IDT71V65603S133BQI IDT71V65603S133PF IDT71V65603S133PFI IDT71V65603S150BG IDT71V65603S150BGI IDT71V65603S150BQ IDT71V65603S150BQI IDT71V65603S150PF IDT71V65603S150PFI IDT71V65803 IDT71V65803S100BG IDT71V65803S100BGI IDT71V65803S100BQ IDT71V65803S100PF IDT71V65803S100PFI IDT71V65803S133BG IDT71V65803S133BGI IDT71V65803S150PF IDT71V65803S100BQI
OCR Text ...- BW4) control (May tie active) Three chip enables for simple depth expansion 3.3V power supply (5%) 3.3V I/O Supply (VDDQ) Power down contr...linear and interleaved burst sequence. The ADV/LD signal is used to load a new external address (ADV...
Description 256K x 36/ 512K x 18 3.3V Synchronous ZBT SRAMs
256K x 36, 512K x 18 3.3V Synchronous ZBT? SRAMs ZBT? Feature 3.3V I/O, Burst Counter Pipelined Outputs
256K x 36 512K x 18 3.3V Synchronous ZBT SRAMs
From old datasheet system
256K x 36, 512K x 18 3.3V Synchronous ZBT SRAMs

File Size 494.46K  /  26 Page

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    Cypress
Part No. CY7C1365V25 CY7C1363V25 CY7C1361V25 7C1361V
OCR Text ...ous self-timed write circuitry. Three synchronous Chip Selects (CE1, CE2, CE3) and an asynchronous output enable (OE) provide for easy bank ...linear burst sequence. When tied to V DDQ or left floating selects interleaved burst sequence. This ...
Description 256K x 36/256K x 32/512K x 18 Flowthrough SRAM
From old datasheet system

File Size 408.99K  /  30 Page

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    TISP3320F3 TISP3240F3 TISP3380F3 TISP3290F3 TISP3260F3 TISP3290F3SL

Power Innovations International, Inc.
Power Innovations Limited
POINN[Power Innovations Ltd]
Part No. TISP3320F3 TISP3240F3 TISP3380F3 TISP3290F3 TISP3260F3 TISP3290F3SL
OCR Text ...pacitance measurements employ a three terminal capacitance bridge incorporating a guard circuit. The third terminal is connected to the guar...Linear voltage ramp, 5 Maximum ramp value < 0.85V(BR)MIN VD = 50 V f = 100 kHz, Vd = 100 mV VD = 0, ...
Description Dual Symmetrical Overvoltage TISP for 3 Wire Ground Backed Ringer Protection
DUAL SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS 双对称瞬态电压抑制器

File Size 456.03K  /  17 Page

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    CY7C1329 CY7C1329-100AC CY7C1329-133AC 7C1329 CY7C1329-75AC CY7C1329L-66AC

CYPRESS[Cypress Semiconductor]
Cypress Semiconductor Corp.
Cypress Semiconductor, Corp.
Part No. CY7C1329 CY7C1329-100AC CY7C1329-133AC 7C1329 CY7C1329-75AC CY7C1329L-66AC
OCR Text ...ous self-timed write circuitry. Three synchronous Chip Selects (CE1, CE2, CE3) and an asynchronous Output Enable (OE) provide for easy bank ...linear burst sequence. When tied to VDDQ or left floating selects interleaved burst sequence. This i...
Description From old datasheet system
64K x 32 Synchronous-Pipelined Cache RAM 64K X 32 CACHE SRAM, 5 ns, PQFP100
64K x 32 Synchronous-Pipelined Cache RAM 64K X 32 CACHE SRAM, 7 ns, PQFP100

File Size 275.62K  /  14 Page

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    SKY77605

Skyworks Solutions Inc.
Part No. SKY77605
OCR Text ... operation ? cmos-compatible three-line logic input, hb enable / lb enable ? both 3g vcc stages can attach to battery or buck dc/dc ?...linear pa with bias optimization for efficiency/linearity tradeoff in 8psk mode ? 3g features -...
Description Multiband Multimode Power Amplifier Module for Quad-Band GSM / EDGE and Broadband (Bands I, II, V, VIII) WCDMA / HSDPA / HSUPA / HSPA Handsets

File Size 106.59K  /  3 Page

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