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Analog Devices, Inc.
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| Part No. |
AD21365WYSWZ2XXA AD21366WYSWZ2XXA AD21364WYSWZ2XX AD21362WYSWZ2XX AD21363WYSWZ2XX ADSP-21364BSWZ-1AA ADSP-21365BSWZ-1AA ADSP-21364KSWZ-1AA ADSP-21363KSWZ-1AA ADSP-21366BSWZ-1AA ADSP-21362BSWZ-1AA ADSP-21363BSWZ-1AA ADSP-21366KSWZ-1AA ADSP-21363BBC-1AA ADSP-21363BBCZ-1AA ADSP-21363KBC-1AA ADSP-21364KBC-1AA ADSP-21362YSWZ-2AA ADSP-21363YSWZ-2AA
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| OCR Text |
... multiplier, shifter, and data register file ? data address generators (dag1, dag2) ? program sequencer with instruction cache ? pm and dm buses capable of supporting four 32-bit data transfers between me mory and the core at every core ... |
| Description |
16-BIT, 33.33 MHz, OTHER DSP, PQFP144 ROHS COMPLIANT, MO-026BFB-HD, LQFP-144
High Precision 32-Bit Floating-Point SHARC Processor for Professional Audio; Package: 144 ld LQFP-EP (20X20mm w/8.8mm Exposed Pad); No of Pins: 144; Temperature Range: Ind 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
High Performance 32-Bit Floating-Point SHARC Processor for Automotive Audio; Package: 144 ld LQFP-EP (20X20mm w/8.8mm Exposed Pad); No of Pins: 144; Temperature Range: Ind 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
High Precision 32-Bit Floating-Point SHARC Processor for Professional Audio; Package: 144 ld LQFP-EP (20X20mm w/8.8mm Exposed Pad); No of Pins: 144; Temperature Range: Comm. 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
High-Performance 32-bit Floating-Point SHARC Processor for General Purpose Applications; Package: 144 ld LQFP-EP (20X20mm w/8.8mm Exposed Pad); No of Pins: 144; Temperature Range: Comm. 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
High-Performance 32-bit Floating-Point SHARC Processor for Home Theater; Package: 144 ld LQFP-EP (20X20mm w/8.8mm Exposed Pad); No of Pins: 144; Temperature Range: Ind 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
High-Performance 32-bit Floating-Point SHARC Processor for General Purpose Applications; Package: 144 ld LQFP-EP (20X20mm w/8.8mm Exposed Pad); No of Pins: 144; Temperature Range: Ind 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
High-Performance 32-bit Floating-Point SHARC Processor for Home Theater; Package: 144 ld LQFP-EP (20X20mm w/8.8mm Exposed Pad); No of Pins: 144; Temperature Range: Comm. 16-BIT, 55.55 MHz, OTHER DSP, PQFP144
SHARC Processors
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| File Size |
1,295.38K /
56 Page |
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Analog Devices, Inc.
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| Part No. |
AD1940YSTZRL AD1941YSTZ AD1941YSTZRL
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| OCR Text |
............ 23 dsp core control register ....................................................... 24 ram configuration register ................................................... 25 control port read/write data formats ................. |
| Description |
SigmaDSP™ Multichannel 28-Bit Audio Processor; Package: LQFP; No of Pins: 48; Temperature Range: Automotive SPECIALTY CONSUMER CIRCUIT, PQFP48
SigmaDSP-TM Multichannel 28-Bit Audio Processor SPECIALTY CONSUMER CIRCUIT, PQFP48
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| File Size |
389.90K /
36 Page |
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it Online |
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Integrated Device Technology, Inc.
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| Part No. |
9179YG-03LF-T
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| OCR Text |
...ters. see configuration map for register functions. the i 2 c specification in philips i 2 c peripherals data handbook (1996) should be followed. buf_in input for fanout buffers (output 0:9). oe oe tristates all outputs when held low. vdd1 ... |
| Description |
9179 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO28 6.10 MM, 0.65 MM PITCH, ROHS COMPLIANT, MO-153, TSSOP-28
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| File Size |
272.25K /
11 Page |
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it Online |
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Integrated Device Technology, Inc.
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| Part No. |
854S54AYI-08LF 854S54AYI-08LFT 854S54AYI-08T
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| OCR Text |
...57 sda input pullup i 2 c shift register serial input. data sampled on the rising edge of sclk. lvcmos/lvttl interface levels. 59, 61 ina0, ina1 input pulldown non-inverting differenti al lvpecl clock input. 60, 62 nina0, nina1 input pullu... |
| Description |
854S SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64 10 X 10 MM, 1 MM HEIGHT, ROHS COMPLIANT, MS-026, TQFP-64
854S SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQFP64 10 X 10 MM, 1 MM HEIGHT, MS-026, TQFP-64
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| File Size |
1,095.03K /
21 Page |
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Cypress
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| Part No. |
CY7C1512KV18-250BZIT
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| OCR Text |
... gen. k k control logic address register d [8:0] read add. decode read data reg. rps wps control logic address register reg. reg. reg. 9 22 18 9 bws [0] v ref write add. decode write reg 9 a (21:0) 22 cq cq doff q [8:0] 9 9 write reg c c 4m... |
| Description |
72-Mbit QDRII SRAM Two-Word Burst Architecture
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| File Size |
636.93K /
34 Page |
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it Online |
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