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IDT
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| Part No. |
IDT82V2108PX8
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| OCR Text |
...the sa national bits and/or any arbitrary timeslot. an elastic store buffer that optionally supports slip buffering and adaptation to backplane timing is provided. in e1 receive path, signaling debounce, signaling freezing, idle code substi... |
| Description |
8 Channel T1/J1/E1 Framer
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| File Size |
1,190.86K /
272 Page |
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SGS Thomson Microelectronics
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| Part No. |
AN547
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| OCR Text |
...first delay psrc is set to some arbitrary value (normally zero) while psrb and psra are set to zero. n.b. at any given point in time the first mac stage in bank c is 1/13
shifter x psrin 1d 3d psrc : 0-1120 1d 1d x 1d x 1d 1d bank c x 1d ... |
| Description |
CASCADING IMSA110S
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| File Size |
177.15K /
13 Page |
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TOSHIBA
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| Part No. |
TLP3507
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| OCR Text |
... trigger led current i ft (arbitrary unit) 100 3 0.1 -40 2 1.2 1 0.5 -20 0 20 40 60 0.3 80 v t = 3v normalized i h ? ta holding current i h (arbitrary unit) 3 0.1 -40 2 1.2 1 0.5 -20 0 20 40 60 0.3 100 80 ambie... |
| Description |
Photocoupler GaAs Ired & Photo -Triac
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| File Size |
144.26K /
6 Page |
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it Online |
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TOSHIBA
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| Part No. |
TLP3502A
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| OCR Text |
... trigger led current i ft (arbitrary unit) 100 3 0.1 40 2 1.2 1 0.5 20 0 20 40 60 0.3 80 v t = 3v normalized i h ? ta holding current i h (arbitrary unit) 3 0.1 40 2 1.2 1 0.5 20 0 20 40 60 0.3 100 80 a... |
| Description |
Photocoupler GaAs Ired & Photo -Triac
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| File Size |
145.43K /
6 Page |
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it Online |
Download Datasheet |
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http://
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| Part No. |
S3C7565
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| OCR Text |
...imer ? external event counter ? arbitrary clock frequency output ? external clock signal divider 16-bit timer/counter ? programmable 16-bit timer ? external event counter ? arbitrary clock frequency output ? external clock signal divider ? ... |
| Description |
single-chip CMOS microcontroller
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| File Size |
294.28K /
42 Page |
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it Online |
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Fujitsu
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| Part No. |
MB85RS128A
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| OCR Text |
...s fram memory cell array dat a. arbitrary 16 bits address and op-code of read are input to si. the most significant address bit is inva lid. then, 8-cycle clock is input to sck. so is output synchronously to the falling edge of sck. while ... |
| Description |
128K (16 K x 8) Bit SPI
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| File Size |
238.75K /
20 Page |
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it Online |
Download Datasheet |
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