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    74ACT2708 74ACT2708PC

FAIRCHILD[Fairchild Semiconductor]
Part No. 74ACT2708 74ACT2708PC
OCR Text ...when the FIFO is full, empty or half full. The FIFO can be expanded to provide different word lengths by tying off unused data inputs. Features s 64-words by 9-bit dual port RAM organization s 85 MHz shift-in, 60 MHz shift-out data rate...
Description 64 x 9 First-In/ First-Out Memory
From old datasheet system
64 x 9 First-In, First-Out Memory

File Size 93.75K  /  13 Page

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    AD7346B AD5011 AD5011B ANALOGDEVICESINC.-AD7346B

Analog Devices, Inc.
AD[Analog Devices]
Part No. AD7346B AD5011 AD5011B ANALOGDEVICESINC.-AD7346B
OCR Text ...smit DAC maximum update rate is half the maximum output data rate i.e. 1168 kHz. The maximum transmit clock is 16 x 1168 = 18.688 MHz. 4 The...word. This ensures correct loading into the DAC. The first 14 bits are loaded into the DAC, the 2 LS...
Description M5100-033-0008
2 Pair/1 Pair ETSI Compatible HDSL Analog Front End

File Size 84.23K  /  8 Page

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    AD9852 AD9852ASQ AD9852AST AD9852_PCB

AD[Analog Devices]
Part No. AD9852 AD9852ASQ AD9852AST AD9852_PCB
OCR Text ...ffset sine wave centered at one-half the applied VDD or a 3 V TTL-level pulse input. 2 Change in duty cycle from 1 MHz to 100 MHz with 1 V p...word that accentuates the aberrations associated with truncation in the DDS algorithm. Figure 15 is ...
Description CMOS 300 MHz Complete-DDS

File Size 424.37K  /  42 Page

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    ADSP-21065 ADSP-21065L ADSP-21065LCS-240 ADSP-21065LKCA-240 ADSP-21065LKCA-264 ADSP-21065LKS-240 ADSP-21065LKS-264

Analog Devices
Part No. ADSP-21065 ADSP-21065L ADSP-21065LCS-240 ADSP-21065LKCA-240 ADSP-21065LKCA-264 ADSP-21065LKS-240 ADSP-21065LKS-264
OCR Text ...clock with a frequency equal to half the instruction rate--a 33 MHz input clock yields a 15 ns processor cycle (which is equivalent to 66 MH...word sizes up to 544 Kbits. All the memory can be accessed as 16-bit, 32-bit or 48-bit. While each m...
Description Low-Cost SHARC, 60 MHz, 180 MFLOPS, 3.3v, Floating Point
DSP Microcomputer

File Size 326.99K  /  44 Page

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    CP82C50A-5 IP82C50A-5 CS82C50A-5 CD82C50A-5 ID82C50A-5 MD82C50A-5 MD82C50A-5B IS82C50A-5 82C50A 82C50 FN2958 ID82C50A

INTERSIL[Intersil Corporation]
Part No. CP82C50A-5 IP82C50A-5 CS82C50A-5 CD82C50A-5 ID82C50A-5 MD82C50A-5 MD82C50A-5B IS82C50A-5 82C50A 82C50 FN2958 ID82C50A
OCR Text ... has data ready to transmit. In half duplex operations, RTS is used to control the direction of the line. BAUDOUT: This output is a 16X cloc...word is always the first serial data bit received and transmitted. The 82C50A data registers are dou...
Description From old datasheet system
CMOS Asynchronous Communications Element

File Size 100.11K  /  21 Page

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    CXD2500BQ

SONY[Sony Corporation]
Part No. CXD2500BQ
OCR Text ...I at the double-speed mode, and half the crystal oscillation frequency. This will result in the normal-speed playback mode. 3 VDD value of 5...Word clock f=2Fs 1, 0 D/A interface for 48-bit slot. LR clock f=Fs Power supply (+5 V) Outputs DA16 ...
Description CD Digital Signal Processor

File Size 667.45K  /  48 Page

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    DS2155 DS1073 DS1073M-100 DS1073M-60 DS1073M-66 DS1073M-80 DS1073Z-100 DS1073Z-60 DS1073Z-66 DS1073Z-80

TE Connectivity, Ltd.
Maxim Integrated Products, Inc.
Dallas Semiconducotr
MAXIM - Dallas Semiconductor
Part No. DS2155 DS1073 DS1073M-100 DS1073M-60 DS1073M-66 DS1073M-80 DS1073Z-100 DS1073Z-60 DS1073Z-66 DS1073Z-80
OCR Text ...from the factory configured for half the maximum operating frequency. Contact the factory for specially programmed devices. As alternatives ...word determines mode of operation and prescaler values; the DIV word sets the value of the programma...
Description Low-Power, Slew-Rate-Limited RS-485/RS-422 Transceivers
1000 Base-T, &#177;15kV ESD Protection LAN Switches 3V的EconOscillator /分频
EconOscillator/Divider EconOscillator /分频
1000 Base-T, ±15kV ESD Protection LAN Switches
3V EconOscillator/Divider
3-Volt EconOscillator/Divider

File Size 257.62K  /  18 Page

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    HDMP-1512 HDMP-1514

Agilent (Hewlett-Packard)
HP[Agilent(Hewlett-Packard)]
Part No. HDMP-1512 HDMP-1514
OCR Text ...to the input latch one byte per half clock cycle. Data byte 0 is transmitted on the rising edge of TBC and data byte 1 is transmitted 1/2 cl...word boundary has been defined as the K28.5 character, also known as a comma character. The receiver...
Description Fibre Channel Transmitter and Receiver Chipset

File Size 245.24K  /  26 Page

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