| |
|
 |
INTEL[Intel Corporation]
|
| Part No. |
KU386
|
| OCR Text |
...ck Two-Clock Bus Cycles Address pipelining Allows Use of Slower Cheaper Memories Integrated Memory Management Unit Virtual Memory Support Optional On-Chip Paging 4 Levels of Hardware Enforced Protection MMU Fully Compatible with Those of th... |
| Description |
SX MICROPROCESSOR
|
| File Size |
1,251.17K /
102 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
INTEL[Intel Corporation]
|
| Part No. |
376
|
| OCR Text |
...RESS is used to request address pipelining See Bus Control Signals in Section 4 1 for additional information BUS READY terminates the bus cycle See Bus Control Signals in Section 4 1 for additional information BYTE ENABLES indicate which da... |
| Description |
376TM HIGH PERFORMANCE 32-BIT EMBEDDED PROCESSOR
|
| File Size |
1,275.32K /
95 Page |
View
it Online |
Download Datasheet |
| |
|
|
INTEL[Intel Corporation]
|
| Part No. |
80960CF-16 80960CF-30 80960CF-25
|
| OCR Text |
...ltiplexed 32-bit Burst Bus with pipelining
Y
32-bit Parallel Architecture Two Instructions clock Execution Load Store Architecture Sixteen 32-bit Global Registers Sixteen 32-bit Local Registers Manipulate 64-bit Bit Fields 11 Addressing... |
| Description |
SPECIAL ENVIRONMENT 80960CF-30, -25, -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR
SPECIAL ENVIRONMENT 80960CF-30 -25 -16 32-BIT HIGH-PERFORMANCE SUPERSCALAR PROCESSOR
|
| File Size |
1,164.87K /
62 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
