Description |
3.3v / 5v ECL Quad 2-Input differential AND/NAND 5v ECL Low Impedance Driver LOW vOLTAGE DUAL 1:4, 1:5 differential FANOUT BUFFER 8 Input priority Encoder 3.3v ECL Triple D-Type Flip-Flop with Set and Reset 3.3v / 5v ECL Quad D Flip Flop with Set, Reset, and differential Clock 3.3v Dual differential LvpECL to LvTTL Translator 3.3v / 5v ECL 6-Bit differential Register with Master Reset 3.3v ECL 1:15 differential ÷1/÷2 Clock Driver Fibre Channel Coaxial Cable Driver and Loop Resillency Circuit 3.3 v 1:9 differential HSTL/pECL to HSTL Clock Driver with LvTTL Clock Select and Enable 3.3v / 5v ECL 8-Bit Synchronous Binary Up Counter 2.5 v/3.3 v SiGe Selectable differential Clock and Data D Flip-Flop/Clock Divider with Reset and OLS 3.3v / 5v programmable pLL Synthesized Clock Generator (25 to 400 MHz) 2.5 v/3.3 v SiGe 1:2 differential Clock Driver with RSECL Outputs 2.5 v/3.3 v SiGe 1:10 differential Clock Driver with RSECL Outputs Triple 4-3-3-Input NOR Gate 9-Bit ECL-TTL Translator AC Characteristics of ECL Devices
|