| |
|
 |
|
| Part No. |
SK10EL11WDT SK100EL11WDT SK100EL11WMST SK100EL11WU SK10EL11WU
|
| OCR Text |
...ermination techniques for ecl / lvecl / pecl / lvpecl devices an1004 - interfacing between lvds and ecl / lvecl / pecl / lvpecl an1005 - using ecl / lvecl devices as pecl / lvpecl an1006 - designing with 10k and 100k ecl / pecl devices ... |
| Description |
10EL SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
100EL SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
100EL SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), UUC
10EL SERIES, LOW SKEW CLOCK DRIVER, 2 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), UUC
|
| File Size |
117.03K /
6 Page |
 View
it Online |
Download Datasheet
|
| |
|
|
ONSEMI[ON Semiconductor]
|
| Part No. |
NBSG53AMNG NBSG53AMNR2G NBSG53A_06 NBSG53ABA NBSG53ABAEVB NBSG53ABAR2 NBSG53AMN NBSG53AMNR2 NBSG53A06
|
| OCR Text |
...d and can be driven with either lvecl or LVCMOS/LVTTL input levels. Data is transferred to the outputs on the positive edge of the clock. Th...ecl, CML, LVCMOS, LVDS, LVTTL Input ecl, CML, LVCMOS, LVDS, LVTTL Input - - ecl, CML, LVCMOS, LVDS, ... |
| Description |
2.5V/3.3V SiGe Selectable Differential Clock and Data D Flip−Flop/Clock Divider with Reset and OLS
|
| File Size |
150.51K /
18 Page |
View
it Online |
Download Datasheet |
| |
|
|
MAXIM - Dallas Semiconductor
|
| Part No. |
MAX9400EVKIT
|
| OCR Text |
...kit runs at Pecl/ecl and LVPecl/lvecl supplies at clock rates up to 3.0GHz. The EV kit can be operated synchronously with an external clock or asynchronously. The EV kit is designed with 50 controlled-impedance traces in a four-layer PC boa... |
| Description |
Evaluation Kit for the MAX9400/MAX9401/MAX9402/MAX9403/MAX9404/MAX9405
Evaluation Kit for the MAX9400 MAX9401/MAX9402/MAX9403/MAX9404/MAX9405
|
| File Size |
409.53K /
6 Page |
View
it Online |
Download Datasheet |
|
Price and Availability
|
