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ICST
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| Part No. |
ICS9148-25
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| OCR Text |
... device meets the Pentium power-up stabilization, which requires that CPU and PCI clocks be stable within 2ms after power-up. High drive PCI...level when low* SDRAM clock Halts CPU clocks at next logic "0" level when low* Supply for SDRAM (0:5... |
| Description |
Pentium/Pro System and Cyrix Clock Chip
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| File Size |
433.26K /
13 Page |
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it Online |
Download Datasheet
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Interation
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| Part No. |
IA4320
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| OCR Text |
...tion based on the internal wake-up timer.
BLOCK DIAGRAM
MIX
I
AMP
IN1 13 LNA IN2 12 MIX Q
PLL & I/Q VCO with cal. RF Parts...level. It goes high if the received signal strength exceeds a given preprogrammed level. An analog R... |
| Description |
Universal ISM Band FSK Transceiver
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| File Size |
1,021.10K /
29 Page |
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it Online |
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Intersil
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| Part No. |
HI-200 HI-201
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| OCR Text |
...ration for input signal voltage up to the supply rails and for signal current up to 80mA. Rugged DI construction eliminates latch-up and sub...LEVEL SHIFTER, AND DRIVER
SWITCH CELL
GATE
DRAIN OUTPUT
V-
TRUTH TABLE HI-200 ON OFF ... |
| Description |
Analog Switch, SPST, Dual, NClosed, Ron = 55, TTL Inputs, 80mA Signal Current, CMOS
Analog Switch, SPST, Quad, NClosed, Ron = 55, TTL Inputs, Ton = 240ns, 80mA Signal Current, CMOS
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| File Size |
208.90K /
10 Page |
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it Online |
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AVAGO TECHNOLOGIES
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| Part No. |
HCTL-2017 HCTL2017 HCTL2021
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| OCR Text |
...drature decoder logic, a binary up/down state counter, and an 8-bit bus interface. The use of Schmitt-triggered CMOS inputs and input noise ...Level Input Voltage High-Level Input Voltage Schmitt-Trigger Positive-Going Threshold Schmitt-Trigge... |
| Description |
(HCTL2017 / HCTL2021) Quadrature Decoder/Counter Interface ICs
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| File Size |
211.88K /
12 Page |
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it Online |
Download Datasheet |
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Price and Availability
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