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| Part No. |
MT41J1G4THD-15 MT41J512M8THD-187E MT41J512M8THD-15
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| OCR Text |
...ay in the respective ba nk. a10 sampled during a precharge command determines whether the prechar ge applies to one bank (a10 low, bank selected by ba[2:0]) or all banks (a10 high). the address inputs also provide the op-code during a l... |
| Description |
64M X 4 DDR DRAM, 1.5 ns, PBGA78
32M X 8 DDR DRAM, 1.87 ns, PBGA78
32M X 8 DDR DRAM, 1.5 ns, PBGA78
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| File Size |
455.80K /
14 Page |
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it Online |
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FREESCALE SEMICONDUCTOR INC
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| Part No. |
MC7448HX1400NC MC7448HX1000ND MC7448HX1267NC
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| OCR Text |
...t 100% tested but periodically sampled. 3. maximum power consumption is the average measured at nominal v dd and maximum operating junction temperature (see tab le 4 ) while running an entirely cache-resident, contrived sequence of instr... |
| Description |
32-BIT, 1400 MHz, RISC PROCESSOR, CBGA360
32-BIT, 1000 MHz, RISC PROCESSOR, CBGA360
32-BIT, 1267 MHz, RISC PROCESSOR, CBGA360
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| File Size |
113.71K /
14 Page |
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it Online |
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| Part No. |
MT41J1G4THD-187ED MT41J1G4THU-187A MT41J1G4THU-15A
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| OCR Text |
...ay in the respective ba nk. a10 sampled during a precharge command determines whether the prechar ge applies to one bank (a10 low, bank selected by ba[2:0]) or all banks (a10 high). the address inputs also provide the op-code during a l... |
| Description |
1G X 4 DDR DRAM, PBGA78
1G X 4 DDR DRAM, PBGA82
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| File Size |
455.67K /
14 Page |
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it Online |
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PROMOS TECHNOLOGIES INC
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| Part No. |
V59C1512804QBF37
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| OCR Text |
...l inputs except dqs and dms are sampled on the rising edge of ck. cke input activates the ck signal when high and deactivates the ck signal when low, thereby initiates either the power down mode, or the self refresh mode. cs input cs ena... |
| Description |
64M X 8 DDR DRAM, 0.5 ns, PBGA60
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| File Size |
1,189.75K /
76 Page |
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it Online |
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Mosel Vitelic
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| Part No. |
V54C365164VL
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| OCR Text |
... = 1 mhz * note: capacitance is sampled and not 100% tested. symbol parameter max. unit c i1 input capacitance (a0 to a11) 5 pf c i2 input capacitance ras ,cas ,we ,cs , clk, cke, dqm 5pf c io output capacitance (i/o) 6.5 pf c clk input cap... |
| Description |
HIGH PERFORMANCE 225/200/166/143 MHz 3.3 VOLT 4M X 16 SYNCHRONOUS DRAM 4 BANKS X 1Mbit X 16
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| File Size |
706.89K /
56 Page |
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it Online |
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| Part No. |
MT8VDDT1664HDG-335XX
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| OCR Text |
...he respective device bank. a10 sampled during a precharge command determines whether the precharge applies to one device bank (a10 low, devi ce bank selected by ba0, ba1) or all device banks (a10 high). the address inpu ts also provide ... |
| Description |
16M X 64 DDR DRAM MODULE, 0.75 ns, ZMA200
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| File Size |
490.71K /
14 Page |
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it Online |
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HYNIX SEMICONDUCTOR INC
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| Part No. |
HY5PS12821F-Y6
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| OCR Text |
... and control input signals are sampled on the crossing of the positive edge of ck and negative edge of ck . output (read) data is referenced to the crossings of ck and ck (both directions of crossing). cke input clock enable: cke high a... |
| Description |
64M X 8 DDR DRAM, PBGA60
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| File Size |
885.74K /
67 Page |
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it Online |
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HYNIX SEMICONDUCTOR INC
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| Part No. |
HY5DU561622ELTP-L
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| OCR Text |
...and write data masks inputs are sampled on both rising and falling edges of it. the data paths are inter- nally pipelined and 2-bit prefetched to achieve very high bandwidth. all input and output voltage levels are compatible with sstl_2... |
| Description |
16M X 16 DDR DRAM, 0.75 ns, PDSO66
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| File Size |
235.08K /
29 Page |
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it Online |
Download Datasheet |
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