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Intersil
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Part No. |
82C52
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OCR Text |
...causes intr to be set true when inten and mien are true. a false level on cts will inhibit transmission of data on the sd0 output and will hold sd0 in the mark (high) state. if cts goes false during transmission, the current character bei... |
Description |
Serial Controller Interface, UART, Baud Rate Generator, CMOS, 1M Baud
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File Size |
253.52K /
18 Page |
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it Online |
Download Datasheet |
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Intersil
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Part No. |
CD82C52 8501501XA
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OCR Text |
...causes INTR to be set true when inten and MIEN are true. A false level on CTS will inhibit transmission of data on the SD0 output and will hold SD0 in the Mark (high) state. If CTS goes false during transmission, the current character being... |
Description |
CMOS Serial Controller Interface
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File Size |
259.96K /
20 Page |
View
it Online |
Download Datasheet |
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Price and Availability
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